All I/Os are equipped with a rich selection of programmable features capable of adapting to a wide variety of application environments. Two layout structures, both optimized for pad limited and core limited designs, are available to support each programmable feature or function.
- 3.3V input, 3.3V output drive
- 3.3V with 5V tolerance input, 3.3V output drive
- Output buffer with programmable drive strength from 2mA to 8mA with 2mA step, 4mA to 16mA with 4mA step
- Input buffer with programmable pull up resistance, pull down resistance, keeper, and Schmitt trigger
- Built-in Antenna diodes for all pins
- ESD Robustness and Latch-up immunity proven by Silicon
- Pad-Over-Circuit (POC) applications(optional)