The C-16450 core is the Verilog/VHDL synthesizable model of industry standard 16450 Universal Asynchronous Receiver/Transmitter.
- Functionally based on the 16450 device
- Transmission of programmable word length (5, 6, 7, 8) and stop bits (1,1.5, or 2)
- Even, odd, force, or no parity generation and detection
- Possibility to remove selected parts of the co re, e.g. receiver or transmitter (one of them is required), baud generator, modem controller, interrupt controller, scratch patch register.
- C-16450 core is available for free!*
- * The Active-HDL application is required.