The NVMe Host Controller is highly flexible and configurable design targeted for both Enterprise and client class solutions that unlock the current and future potential of PCIe-based SSDs. The NVM Express Host Controller efficiently supports multi-core architectures ensuring thread(s) may run on each core with their own queue and interrupt without any locks required. It provides support for end-to-end data protection, security and encryption as well as robust error reporting and management capabilities. The controller architecture is carefully tailored to optimize link and throughput utilization, latency, reliability, power consumption, and silicon footprint.
The NVM Express host controller can be used along with its PCI Express controller (GPEX) and any third party NAND Flash controller.
The NVMe Host controller comes with 2 flavors:
* Native NVMe Controller with proprietary control and Data path interfaces
* NVMe Controller with AXI Control and Data path interfaces for easy adoption in an SoC implementation.
UNEX Host Controller design is independent of implementation tools and target technology. Mobiveil solution allows the licensees to easily migrate among FPGA, Gate array and Standard cell technologies optimally.
- Compliant to NVM Express 1.1 specification
- Support for configurable number of IO Queues
- Support for configurable Queue depth
- Support for Round Robin or Weighted Round Robin with Urgent Priority arbitration mechanism
- Host memory page size support of 128MB
- Efficient and streamlined command handling
- Supports Fused Operations
- Supports All Optional Admin Commands
- Supports All Optional NVM Commands
- Supports Multi-Path IO and Namespace Sharing capabilities
- Supports Reservations
- Supports multiple name spaces
- Optional AXI interfaces for NVMe implementation in SoC
- Well defined Command Interface for local CPU to perform subsystem initialization and to handle all non-hardware accelerated commands
- Superior architecture-optimized for high performance, low latency, low power and low gate count
- Feature rich, highly flexible, scalable, configurable and timing friendly design
- Ease of integration
- Verified with leading VIP
- Verilog RTL
- HVL based test bench and behavioral models
- Test cases
- Protocol checkers, bus watchers and performance monitors
- Configurable synthesis shell
- NVM SW Stack
Block Diagram of the NVMe Host Controller