The Xilinx LogiCORE™ IP Auxiliary Processor Unit (APU) Floating-Point Unit is an optimized floating-point unit designed for the PowerPC™ 440 embedded microprocessor of the Virtex™-5 FXT FPGA family. It provides support for IEEE-754 floating-point arithmetic operations in single or double precision.
- Compliant with the IEEE-754 standard for single and double-precision floating-point arithmetic, with minor and documented exceptions
- Decodes and executes standard PowerPC floating-point instructions
- Optimized for 2:1 APU:CPU clock ratio, allowing PowerPC to operate at maximum frequency
- Uses autonomous instruction issue to hide arithmetic latency and decrease cycles per instruction
- Optimized implementation leverages Virtex-5 high-performance DSP features
- Integrated into Xilinx Embedded Development Kit (EDK) design flow