Functionality
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* Regulator Spec.
- LDO 1st : Input 3.3V, Output 1.8V, 30mA
- LDO 2nd : Input 3.3V, Output 1.8V, 10mA
Target size : Total Area : 0.04 square mm
* PLL Spec.
- Input Frequency Range : 1MHz ~ 10MHz
- Output Frequency Range : 150MHz ~ 250MHz, Typ. 200MHz
(or 300MHz ~ 500MHz, Typ. 400MHz)
- Jitter (peak to peak) : Max. 40ps
- Input divider : 8 bits
- Output divider : 8 bits
- Internal Loop Filter (Low pass Filter)
- Target Area : 0.15 square mm
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Timing or Performance requirements
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* Regulator Spec.
- LDO 1st : Input 3.3V, Output 1.8V, 30mA
- LDO 2nd : Input 3.3V, Output 1.8V, 10mA
Target size : Total Area : 0.04 square mm
* PLL Spec.
- Input Frequency Range : 1MHz ~ 10MHz
- Output Frequency Range : 150MHz ~ 250MHz, Typ. 200MHz
(or 300MHz ~ 500MHz, Typ. 400MHz)
- Jitter (peak to peak) : Max. 40ps
- Input divider : 8 bits
- Output divider : 8 bits
- Internal Loop Filter (Low pass Filter)
- Target Area : 0.15 square mm
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Technology Requirements
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SMIC 0.18um Logic process.
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Availability Timing
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ASAP.
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Quality requirement
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* Regulator Spec.
- LDO 1st : Input 3.3V, Output 1.8V, 30mA
- LDO 2nd : Input 3.3V, Output 1.8V, 10mA
Target size : Total Area : 0.04 square mm
* PLL Spec.
- Input Frequency Range : 1MHz ~ 10MHz
- Output Frequency Range : 150MHz ~ 250MHz, Typ. 200MHz
(or 300MHz ~ 500MHz, Typ. 400MHz)
- Jitter (peak to peak) : Max. 40ps
- Input divider : 8 bits
- Output divider : 8 bits
- Internal Loop Filter (Low pass Filter)
- Target Area : 0.15 square mm
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Business Scheme Requirement
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one time license but it can be used often due to product series
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