Synopsys® Verification IP (VIP) for AMBA® 4 interconnects provides complete protocol support for AXI™ 3, AXI4, AXI4-Lite, AXI4-Stream, ACE and ACE-Lite interfaces. With a comprehensive set of protocol, methodology, verification and ease-of-use features, users are able to achieve rapid verification convergence on their AMBA-based designs.
Synopsys VIP for AMBA 4 is integrated with the Discovery Protocol Analyzer, a protocol-centric debug environment that gives users an easy to understand, graphical view of complex traffic.
Synopsys VIP for AMBA 4 is written in SystemVerilog to run natively for optimum performance.
Testbench development is accelerated with the assistance of built-in verification plans, example tests and scenario library.
Built-in coverage points integrate with the verification plans showing progress towards achieving coverage goals.
- System and port level protocol checks for AXI3/4/Lite, AXI4-Stream and ACE/
- ACE-Lite protocols
- Built in functional coverage and verification plans for AXI3/4/Lite, AXI4-Stream
- and ACE/ACE-Lite protocols
- Built-in UVM Sequence and VMM Scenario library
- Integrated with Protocol Analyzer protocol-aware debug environment
- Debug port for transaction tracking
- Supports UVM, OVM, VMM and Verilog Testbench
- Extensive callbacks, messaging and functional
- High Performance
- Extensive Protocol verification