Single Edge Nibble Transmission (SENT) is a single-wire, serial unidirectional communication protocol. It is intended for use in applications where high resolution sensor data needs to be communicated from a sensor to an Engine Control Unit (EUC). It is intended as a replacement or the lower resolution methods of 10 bit A/D's and as a simpler low cost alternative to CAN or LIN in automotive industry. SENT VIP are reusable components that provide ready made verification environment. Compatible with Single Edge Nibble Transmission (SENT) specifications and supports all the frame types. SAE J2716 includes an extensive test suite covering most of the possible scenarios. It can perform all protocal tests and moreover it allows an easy generation of very high number of patterns and a set of specified patterns to stress the DUT.
SAE J2716 VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
Features
- Compatible with Single Edge Nibble Transmission (SENT) speciation SAE J2716 JAN2010
- Supports all types of frames.
- Short Serial Message format
- Enhanced Serial Message format
- Enhanced serial message formats Supports different configurations
- 12-bit data and 8-bit message ID
- 16-bit data and 4-bit message ID
- These SAE J2716 nodes can be conĀ¬figured as Sensor, Active Device or Passive Device nodes.
- The DUT can either be a SAE J2716 sensor or device.
- Supports programmable clock frequency of operation.
- Built-in checkers ensures that SAE J2716 Protocol has been followed correctly.
- Supports all types of error insertion and detection
- Checksum error
- Message ID error
- Oversize error
- Sync error
- Supports pause pulse properties
- Minimum length 12 ticks
- Maximum length 768 ticks
- Glitch insertion and detection
- Functional coverage for complete SAE J2716 features.
- Monitors, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
- Allows creation of both random and directed testcases as well as constraints randomization.
- SAE J2716 Verification IP comes with complete testsuite to test every feature of SAE J2716 specification.
- Functional coverage for all features of SAE J2716.
Benefits
- Faster testbench development and more complete verification of SAE J2716 designs.
- Easy to use command interface simplifies testbench control and configuration of device and sensor.
- Simplifies results analysis.
- Runs in every major simulation environment.
Deliverables
- Complete source code of verification IP
- Complete regression suite containing all the SAE J2716 testcases.
- Examples's showing how to connect various components, and usage of Sensor, Device and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
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