On-Demand Webinar
Low power design principles for short range wireless IPs

By Dr. Raghunath Govindachari , CTO R&D Services
Mindtree

Overview:

Portable, handheld or battery powered systems today routinely include wireless connectivity such as Bluetooth. Wireless protocols like Bluetooth define low power modes such as Sniff, Hold or Park and wireless interface controller SOCs attempt to provide sleep mode states for these low power modes of the protocol. These sleep mode states utilize standard power save techniques such as clock and power gating, with varying degrees of actual power save depending on the wake up time constraints and duty cycle requirements of the application. The efficacy of these techniques are rather limited to simple use cases scenarios and does not address potential for power save while in active modes. Worse still, a poorly designed or an ill behaved remote device can influence the power drain of this device, because of higher level of activity. Therefore, power saving while in active modes becomes critical.
We put forth several principles for designing wireless interfaces for lowering power while in active modes. We further observe that while IP cores may be optimized for power save, the interfaces between the IP cores and the rest of the SOC may not be adequately optimized. We also highlight module interface design principles towards power aware interface design.
We explain these principles using the case of Bluetooth System on Chip design.

Biography:

Dr. Raghunath Govindachari holds a Doctorate in Computer Science from Carleton University, Ottawa, Canada. He has over 20 years of industry experience developing complex real-time embedded systems, and telecommunication software systems. Dr. Govindachari is currently the Chief Technology Officer of MindTree R&D services. In MindTree, he has been leading Research & Development of short range wireless technologies and their integration into consumer, computing, automotive and medical devices. Prior to joining MindTree in 2000, he worked in Wipro Global R&D where he was leading the Mobile Switching Center Call processing software group. Earlier he worked in Central Research Laboratories of Bharat Electronics, developing hard real-time systems for defense applications.
His research interests include systems and software architecture for performance with modularity, performance engineering of communication subsystems, Cognitive and Software Defined Radios and multi-protocol MAC architectures. He has filed for 2 patents in the area of Bluetooth applications.