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		<title>Design And Reuse</title>
		<link>http://www.design-reuse.com/</link>
		<description>The industry source for engineers and technical managers worldwide.</description>
		<language>en-us</language>
		<copyright>Copyright 2005, Design And Reuse S.A.</copyright>
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		<title>Design And Reuse</title> 
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		<link>http://www.design-reuse.com/</link> 
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			<title><![CDATA[Xilinx Updates June Quarter Guidance]]></title>
			<link>http://www.design-reuse.com/go2/421026/1</link>
			<description><![CDATA[Xilinx today provided updated financial guidance for the June quarter of fiscal 2010. June quarter sales are expected to be down approximately 5% sequentially.
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			<pubDate>Thu, 02 Jul 2009 14:29:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[TSMC Unveils First Commercial 65-Nanometer Multi-Time Programmable Non-Volatile Memory Technology]]></title>
			<link>http://www.design-reuse.com/go2/421024/1</link>
			<description><![CDATA[TSMC today announced the foundry segment’s first functional 65-nanometer (nm) multi-time programmable (MTP) non-volatile memory (NVM) process technology. The technology incorporates process-qualified MTP IP blocks jointly developed with Virage Logic.]]></description>
			<pubDate>Thu, 02 Jul 2009 11:07:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[10-Bit, 320 MSPS Dual DAC (Current Steering, 65nm) from Alvand Technologies]]></title>
			<link>http://www.design-reuse.com/go2/121023/1</link>
			<description><![CDATA[10-Bit, 320 MSPS Dual DAC (Current Steering, 65nm) from Alvand Technologies]]></description>
			<pubDate>Thu, 02 Jul 2009 11:03:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[ONFi Verification IP based on OVM 2.0 from Perfectus Technology]]></title>
			<link>http://www.design-reuse.com/go2/121022/1</link>
			<description><![CDATA[ONFi Verification IP based on OVM 2.0 from Perfectus Technology]]></description>
			<pubDate>Thu, 02 Jul 2009 10:56:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[50GHz Programmable Prescaler - Divider by 1/2/4/8/16 from Pacific MicroCHIP]]></title>
			<link>http://www.design-reuse.com/go2/121021/1</link>
			<description><![CDATA[50GHz Programmable Prescaler - Divider by 1/2/4/8/16 from Pacific MicroCHIP]]></description>
			<pubDate>Thu, 02 Jul 2009 10:42:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[PRODUCT HOW-TO: The care and feeding of embedded Linux running on MIPS CPUs]]></title>
			<link>http://www.design-reuse.com/go2/321020/1</link>
			<description><![CDATA[An update on the use of Linux in many embedded consumer and networking applications and how MIPS Technologies hardware and software can be used to make the development process easier.]]></description>
			<pubDate>Thu, 02 Jul 2009 10:01:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Clock Mesh Variation Robustness: Benefits and Analysis]]></title>
			<link>http://www.design-reuse.com/go2/321019/1</link>
			<description><![CDATA[Circuit delay is increasingly affected by process variations at lower technology nodes. Technologies that offer variation tolerance boost design performance and productivity.  This article gives an overview and highlights the benefits of clock mesh technology compared to conventional clock tree methods.]]></description>
			<pubDate>Thu, 02 Jul 2009 09:37:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[The ESL battle for hearts and minds ]]></title>
			<link>http://www.design-reuse.com/go2/421018/1</link>
			<description><![CDATA[Things have turned deadly serious this week between two major players in the ESL market, Mentor Graphics and Forte Design Systems.  ]]></description>
			<pubDate>Thu, 02 Jul 2009 09:28:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Altair Semiconductor Successfully Integrates TurboConcept turbo-code IP Cores into its LTE Baseband Processor Product Line]]></title>
			<link>http://www.design-reuse.com/go2/421017/1</link>
			<description><![CDATA[Altair Semiconductor, a fabless chip company developing the world's most advanced 4G mobile semiconductors for handheld devices, today announced that it has successfully integrated the TurboConcept LTE/WiMAX solutions in its LTE FourGee product line. ]]></description>
			<pubDate>Thu, 02 Jul 2009 09:02:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Initio Corp. Takes an ARC License Targeting Rapid-Growth USB 3.0 and Solid State Disk Controller Markets]]></title>
			<link>http://www.design-reuse.com/go2/421016/1</link>
			<description><![CDATA[The ARC 600 will be embedded within USB 3.0 bridge controllers and SSD controllers to provide a Serial ATA2 to USB 3.0 Bridge and/or individual SATA2 and USB 3.0 outputs. The ARC 600 replaces an 8051 which is overwhelmed by the processing requirements of this application.]]></description>
			<pubDate>Thu, 02 Jul 2009 08:03:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Indian design firms see uptick when recession ends]]></title>
			<link>http://www.design-reuse.com/go2/421015/1</link>
			<description><![CDATA[The current global recession is driving development costs down, prompting many Indian chip and embedded design service providers to predict an uptick once the downturn ends. ]]></description>
			<pubDate>Thu, 02 Jul 2009 07:46:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Panavision Imaging and Tower Semiconductor Announce Production of World's Fastest Single Port Re-Configurable Linear Image Sensors]]></title>
			<link>http://www.design-reuse.com/go2/421025/1</link>
			<description><![CDATA[Panavision Imaging and Tower Semiconductor today announced production of Panavision’s family of DLIS-2K re-configurable line scan CMOS image sensors. The DLIS-2K sensors were developed using Tower’s Advanced Photo Diode (APD) pixel process and pixel IP with Panavision’s patented Imager Architecture. ]]></description>
			<pubDate>Thu, 02 Jul 2009 01:20:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Cosmic Circuits tapes out 40nm Mixed Signal Test Chip]]></title>
			<link>http://www.design-reuse.com/go2/421013/1</link>
			<description><![CDATA[Cosmic Circuits  announced the tape out of its TSMC 40nm Mixed Signal test chip. The test chip consists of several data converters and power regulators for Wireless Communications and Portable consumer applications.]]></description>
			<pubDate>Wed, 01 Jul 2009 18:14:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Motorola Joins Via Licensing Joint Licensing Program for Near Field Communications]]></title>
			<link>http://www.design-reuse.com/go2/421012/1</link>
			<description><![CDATA[Via Licensing announced today that Motorola, Inc. has joined its joint licensing program for patents essential to the practice of Near Field Communications (NFC) as a licensor.]]></description>
			<pubDate>Wed, 01 Jul 2009 14:08:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[NSCC Launches First AVS SD Decoder Optimized For The ARM Cortex-A8 Processor With NEON Technology]]></title>
			<link>http://www.design-reuse.com/go2/421011/1</link>
			<description><![CDATA[ARM  and NSCC today announced that NSCC has successfully developed the first AVS Standard Definition (SD) decoder optimized for the ARM® Cortex™-A8 processor with NEON™ technology.  The AVS (GB/T GB/T200090.2) is the second generation of source coding/decoding standard developed by the AVS Workgroup (Audio and Video Coding Standard Workgroup of China).]]></description>
			<pubDate>Wed, 01 Jul 2009 13:47:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Rapid debug of serial buses in FPGAs ]]></title>
			<link>http://www.design-reuse.com/go2/321010/1</link>
			<description><![CDATA[Low-speed serial buses remain prevalent across several electronics industries. Serial buses such as I2C, SPI, CAN, LIN, and RS-232 are often key points for debugging designs with FPGAs which higher speed serial buses quickly pass data from chip to chip. Historically, capturing and decoding the information required significant manual effort if using an oscilloscope or the purchase of custom tools. Oscilloscope vendors now incorporate significant application technology that simplifies debug of low-speed serial buses.]]></description>
			<pubDate>Wed, 01 Jul 2009 11:14:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[LogicVision's Memory BIST &amp; Automated Diagnosis Solutions Included by TSMC in Its Advanced Embedded Memory Development Program and QA Flow]]></title>
			<link>http://www.design-reuse.com/go2/421009/1</link>
			<description><![CDATA[ETMemory is a key component of LogicVision's Dragonfly Test Platform(TM) and provides TSMC with an advanced memory BIST IP and insertion automation solution. Silicon Insight, another Dragonfly test platform component, enables automated and interactive diagnosis and characterization of memories tested with ETMemory BIST.]]></description>
			<pubDate>Wed, 01 Jul 2009 08:18:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[DensBits Selects ARC Storage to Silicon for Next Generation Multi-Bit Per-Cell Flash Technology]]></title>
			<link>http://www.design-reuse.com/go2/421008/1</link>
			<description><![CDATA[ARC International announced that DensBits Technologies Ltd. has taken a license to use a member of the configurable and extendable ARC® 600 Storage to Silicon family of cores. The ARC Storage to Silicon engine will be used in next generation multi-bit per-cell Flash technology that is superior to any of the existing multi-bit per-cell technologies.]]></description>
			<pubDate>Wed, 01 Jul 2009 08:02:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Virage Logic Expands Presence in India to Serve Growing Market Demand for Broad IP Portfolio]]></title>
			<link>http://www.design-reuse.com/go2/421007/1</link>
			<description><![CDATA[Virage Logic today announced it has expanded its presence in India with the appointment of CoreEL as its sales representative.]]></description>
			<pubDate>Wed, 01 Jul 2009 07:15:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Synopsys MVSIM Adopted for Low Power Verification of STw8500 Mobile SoC Platform]]></title>
			<link>http://www.design-reuse.com/go2/421014/1</link>
			<description><![CDATA[ST-Ericsson selected MVSIM for its proven ability to comprehensively verify low power techniques, including standby and built-in automated low power assertions, which enable the early detection of bugs. The tool's extensive support for the IEEE 1801 [Unified Power Format (UPF)] power format, on which the STw8500 project team has standardized, was also a deciding factor.]]></description>
			<pubDate>Wed, 01 Jul 2009 06:16:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[ARC International: Trading Update and Outcome of Strategic Review]]></title>
			<link>http://www.design-reuse.com/go2/421006/1</link>
			<description><![CDATA[ARC International provides an update on the completion of a strategic review of its operations, changes to its executive team and an update on trading.]]></description>
			<pubDate>Tue, 30 Jun 2009 14:40:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[SMIC Achieves Silicon Success with High Performance 45-nanometer Process]]></title>
			<link>http://www.design-reuse.com/go2/421005/1</link>
			<description><![CDATA[SMIC today announced the successful completion of its first 45-nanometer high performance (GP, generic process with high performance) yield lot.]]></description>
			<pubDate>Tue, 30 Jun 2009 14:36:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[eInfochips Announces VMM-Enabled MIPI CSI-2, DSI &amp; HSI and SDIO Verification IP for the Synopsys DesignWare Verification IP Alliance Program]]></title>
			<link>http://www.design-reuse.com/go2/421004/1</link>
			<description><![CDATA[eInfochips today announced the availability of Verification Methodology Manual (VMM)-enabled MIPI® CSI-2 (Camera Serial Interface), DSI (Display Serial Interface), HSI (High Speed Synchronous Interface) &amp; SDIO Verification IP (VIP)]]></description>
			<pubDate>Tue, 30 Jun 2009 14:29:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Virage Logic Sees Strong Adoption of Company's Broad 40nm IP Product Portfolio]]></title>
			<link>http://www.design-reuse.com/go2/421003/1</link>
			<description><![CDATA[Comprising embedded SRAMS, embedded memory test and repair, logic libraries, and memory development software, the Company's silicon-proven 40nm product offering has been designed to optimize area, performance, power and yield. Today, more than ten customers rely on Virage Logic's 40nm product portfolio to design more efficient chips more quickly and with less risk.]]></description>
			<pubDate>Tue, 30 Jun 2009 14:25:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[FFT Library from OptNgn Validated for use in Mentor Graphics' Precision FPGA Synthesis]]></title>
			<link>http://www.design-reuse.com/go2/421002/1</link>
			<description><![CDATA[OptNgn today announced that it has validated its newly released FFT WFTA Kernels Library of streaming IP cores for use with Mentor Graphics Precision® RTL Synthesis. These Winograd Fourier Transform (WFTA) kernels, along with their derivative 1D and 2D libraries, represent a vendor independent and high throughput way to use the cache-free FFT power available in FPGA coprocessors]]></description>
			<pubDate>Tue, 30 Jun 2009 06:35:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[Dolphin Integration's Audio converter Helium lightens both Power consumption and Bill-of-Material]]></title>
			<link>http://www.design-reuse.com/go2/421001/1</link>
			<description><![CDATA[Low power consumption has become a hot selling argument for SoCs targeting nomad audio applications. Class D amplifiers have demonstrated their superior power efficiency for driving loud-speakers.]]></description>
			<pubDate>Tue, 30 Jun 2009 06:28:00 GMT</pubDate>
			<category domain="">Headline News</category>
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			<title><![CDATA[HDMI 1.3 Receiver from Sicon Semiconductor]]></title>
			<link>http://www.design-reuse.com/go2/120996/1</link>
			<description><![CDATA[HDMI 1.3 Receiver from Sicon Semiconductor]]></description>
			<pubDate>Mon, 29 Jun 2009 16:31:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[Embedded Software Architecture Specification Developments in Support of SoC Design and Re-use]]></title>
			<link>http://www.design-reuse.com/go2/320994/1</link>
			<description><![CDATA[This paper reviews the open literature on general software architecture highlighting techniques applicable to the embedded domain. These areas include use of multiple views, hierarchical patterns, standard modeling, advanced documentation and application of architecture assistance tools. Applying software architecture for embedded re-use is an area identified as not being fully explored in current literature. ]]></description>
			<pubDate>Mon, 29 Jun 2009 16:06:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[DVB-T2 LDPC+BCH decoder from TurboConcept]]></title>
			<link>http://www.design-reuse.com/go2/120993/1</link>
			<description><![CDATA[DVB-T2 LDPC+BCH decoder from TurboConcept]]></description>
			<pubDate>Mon, 29 Jun 2009 15:46:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[AMBA 2 AHB to USB 3.0 Host  from PLDA]]></title>
			<link>http://www.design-reuse.com/go2/120992/1</link>
			<description><![CDATA[AMBA 2 AHB to USB 3.0 Host  from PLDA]]></description>
			<pubDate>Mon, 29 Jun 2009 15:40:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[Debugging of embedded Linux applications on ARM9/ARM11 processors ]]></title>
			<link>http://www.design-reuse.com/go2/320982/1</link>
			<description><![CDATA[Embedded Linux as an operating system for modern ARM processors? Maybe not such a bad idea? Linux is a multitasking operating system and therefore, each process must be assigned its own process address space. However, this partitioning greatly complicates the debugging of processors and inter-process functionality. So what can be done to tackle this? This article illustrates some possibilities how you can successfully achieve your goal.]]></description>
			<pubDate>Thu, 25 Jun 2009 16:28:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Modelling Embedded Systems at Functional Untimed Application Level]]></title>
			<link>http://www.design-reuse.com/go2/318418/1</link>
			<description><![CDATA[We propose a structured methodology to allow flexible, accurate and fast system modelling at Functional Untimed Application Level. The methodology is built on 4 levels of abstraction, from the IP Level up to the Use-case Level, where the bottom level gives us accuracy, while the top gives us speed.]]></description>
			<pubDate>Thu, 25 Jun 2009 16:01:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Field-proven, high performance cryptographic software library for embedded applications from Discretix]]></title>
			<link>http://www.design-reuse.com/go2/120980/1</link>
			<description><![CDATA[Field-proven, high performance cryptographic software library for embedded applications from Discretix]]></description>
			<pubDate>Thu, 25 Jun 2009 12:26:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[Production-proven PCI Express (PCIe) Gen1/Gen2 PHY in TSMC 40G from Virage Logic]]></title>
			<link>http://www.design-reuse.com/go2/120978/1</link>
			<description><![CDATA[Production-proven PCI Express (PCIe) Gen1/Gen2 PHY in TSMC 40G from Virage Logic]]></description>
			<pubDate>Wed, 24 Jun 2009 17:20:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[Low power, High performance 32-bit Processor from VinChip]]></title>
			<link>http://www.design-reuse.com/go2/120977/1</link>
			<description><![CDATA[Low power, High performance 32-bit Processor from VinChip]]></description>
			<pubDate>Wed, 24 Jun 2009 17:18:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[Silicon-proven 8-bit RISC microcontroller Compatible with PIC16C5X from ICDREC]]></title>
			<link>http://www.design-reuse.com/go2/120976/1</link>
			<description><![CDATA[Silicon-proven 8-bit RISC microcontroller Compatible with PIC16C5X from ICDREC]]></description>
			<pubDate>Wed, 24 Jun 2009 17:15:00 GMT</pubDate>
			<category domain="">New Products</category>
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			<title><![CDATA[Viewpoint: Capture OCP systems in IP-XACT 1.4 ]]></title>
			<link>http://www.design-reuse.com/go2/320957/1</link>
			<description><![CDATA[A complete standardization process describing how OCP cores and systems can be captured in IP-XACT is a desired end goal.]]></description>
			<pubDate>Tue, 23 Jun 2009 07:36:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Managing an Adaptive Verification Environment with the Open Verification Methodology]]></title>
			<link>http://www.design-reuse.com/go2/320950/1</link>
			<description><![CDATA[The OVM provides a built-in mechanism to statically configure verification components. The verification parameters can be used to control the verification environment topology as well as trigger specific behaviors. In some cases the configuration of the verification environment cannot be predefined at build time. In such cases, the verification components need to adapt their configuration, and hence their behavior, dynamically. For example, the verification environment configuration might be based on the register configuration of the design under verification (DUV) ]]></description>
			<pubDate>Mon, 22 Jun 2009 11:25:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[SuperSpeed USB 3.0: Ubiquitous Interconnect for Next Generation Consumer Applications]]></title>
			<link>http://www.design-reuse.com/go2/320937/1</link>
			<description><![CDATA[To address the bandwidth limitations of the USB 2.0 interface, the USB Implementers Forum (USB-IF) released the SuperSpeed USB 3.0 specifications in November 2008. The USB 3.0 specification provides a maximum bandwidth of up to 5Gbps while limiting power consumption. In this white paper we present the features of the USB 3.0 protocol, discuss the new usage models it enables and compare it with some of the existing interface standards popular in the market today.]]></description>
			<pubDate>Mon, 22 Jun 2009 10:01:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Updating the High Definition Content Protection Standard with Version 2.0]]></title>
			<link>http://www.design-reuse.com/go2/320936/1</link>
			<description><![CDATA[Al Hawtin (Elliptic Technologies) provides a timely update to the High Definition Content Protection security standard which will shortly be supplemented by HDCP Revision 2.0 and how it will impact delivery over wireless connections. ]]></description>
			<pubDate>Thu, 18 Jun 2009 16:47:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Viewpoint: Keep design innovation alive]]></title>
			<link>http://www.design-reuse.com/go2/320935/1</link>
			<description><![CDATA[Take a higher level, holistic view of the aims of the entire product design experience. Reassess the design processes you use and how they map into today's technology and your customer's needs.  ]]></description>
			<pubDate>Thu, 18 Jun 2009 16:42:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[SpiritEd: A Register Specification System integrating IP-XACT and Adobe FrameMaker]]></title>
			<link>http://www.design-reuse.com/go2/317309/1</link>
			<description><![CDATA[In this paper, we present a FrameMakerTM based environment that allows the entry of register data together with the remaining specification. Only the registers are captured by a specialized graphical user interface and stored in a XML database using IPXACT.]]></description>
			<pubDate>Thu, 18 Jun 2009 16:20:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Generic and Automatic Specman based Verification Environment for Image Signal Processing IPs]]></title>
			<link>http://www.design-reuse.com/go2/320907/1</link>
			<description><![CDATA[In this paper, we present a generic and automatic Specman based verification environment for the verification of the image signal processing IPs. Specman based coverage driven random verification is very powerful methodology for the verification of IPs. However, it requires strong knowledge of ‘e’ language. The main aim of development of this verification environment is to more efficiently verify each image signal processing IP (both at module level and sub-system level) which have standard register interface(s) and video data interface(s).]]></description>
			<pubDate>Mon, 15 Jun 2009 15:44:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Viewpoint: Opportunity to win on different design fronts ]]></title>
			<link>http://www.design-reuse.com/go2/320901/1</link>
			<description><![CDATA[Beyond pure process scaling which is necessary to meet today's price, power, and performance goals, chip designers have to grapple with tighter integration and product performance specialities in areas such as integrated power management, image sensing, application-specific data conversion, and enhanced display drivers.]]></description>
			<pubDate>Mon, 15 Jun 2009 12:57:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Real-World Reuse: RTL Recycling]]></title>
			<link>http://www.design-reuse.com/go2/317825/1</link>
			<description><![CDATA[This paper presents the theory that a method can be applied to recycling RTL code that in turn leads to a design that can be easily reused on a new project. By applying this method to the very real process of recycling RTL in the context of a new project, the resultant code actually has been designed for reuse]]></description>
			<pubDate>Thu, 11 Jun 2009 17:02:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Networks-on-Chip with Reprogrammable Interconnections]]></title>
			<link>http://www.design-reuse.com/go2/320887/1</link>
			<description><![CDATA[One of ways for enlargement of ASIC based Systems-on-chip field of application is using of internal interconnection system based on reconfigurable Network-on-chip. In this article we suggest some variants of reconfigurable system-on-chip structure based on physical and virtual channels, evaluate their parameters. We suggest mathematical model for relative hardware cost of systems evaluation We compare hardware cost and throughput for these variants of systems.]]></description>
			<pubDate>Thu, 11 Jun 2009 16:46:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[Tailored SoC Building Using Reconfigurable IP Blocks]]></title>
			<link>http://www.design-reuse.com/go2/320846/1</link>
			<description><![CDATA[Increasing complexity, faster changing standards and shorter time to market ask for composing systems out of standard IP components. An example shows the construction of a System-on-Chip (SoC) based on standard IP components for a Digital Audio Broadcasting consumer application. ]]></description>
			<pubDate>Mon, 08 Jun 2009 10:41:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<item>
			<title><![CDATA[Can MIPI and MDDI Co-Exist?]]></title>
			<link>http://www.design-reuse.com/go2/320832/1</link>
			<description><![CDATA[Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?]]></description>
			<pubDate>Mon, 08 Jun 2009 08:10:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<item>
			<title><![CDATA[Programmability in portable design: the five modes of motivation ]]></title>
			<link>http://www.design-reuse.com/go2/320836/1</link>
			<description><![CDATA[Wendy Lockhart explains that flash based FPGAs can replace ASICs in portable devices.]]></description>
			<pubDate>Thu, 04 Jun 2009 17:03:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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			<title><![CDATA[PRODUCT HOW-TO: Building an FPGA-based Digital Down Converter]]></title>
			<link>http://www.design-reuse.com/go2/320833/1</link>
			<description><![CDATA[When compared on a size/power/cost per channel basis, narrowband, high channel-count DDC cores can be very efficiently implemented in FPGAs. ]]></description>
			<pubDate>Thu, 04 Jun 2009 16:45:00 GMT</pubDate>
			<category domain="">Industry Articles</category>
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