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		<title>Design And Reuse - Headline News</title>
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		<description>The industry source for engineers and technical managers worldwide.</description>
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		<copyright>Copyright 2007, Design And Reuse S.A.</copyright>
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		<title>Design And Reuse - Headline News</title> 
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			<title><![CDATA[Mindspeed Achieves LTE Standards Compliance for Transcede Reference Software Using Agilent Technologies' SystemVue Environment ]]></title>
			<link>http://www.design-reuse.com/go2/422990/87041</link>
			<description><![CDATA[Mindspeed today announced that the company’s reference software for its recently introduced Transcede™ baseband processor has been verified for compliance with the latest long-term evolution (LTE) Layer 1 standard 3rd Generation Partnership Project (3GPP) TS 36.141. ]]></description>
			<pubDate>Mon, 22 Mar 2010 11:56:00 GMT</pubDate>
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			<title><![CDATA[Multiple Tensilica IP Cores Power NEC, Fujitsu and Panasonic Mobile Communications Fully Functional LTE Handset SOC for Major Japanese Wireless Carrier]]></title>
			<link>http://www.design-reuse.com/go2/422986/87041</link>
			<description><![CDATA[Tensilica today announced that NTT DOCOMO has confirmed that several Tensilica Xtensa LX dataplane processor cores (DPUs) are used in the latest LTE mobile handset system-on-chip (SOC) design demonstrated in February at the Mobile World Congress.]]></description>
			<pubDate>Mon, 22 Mar 2010 05:28:00 GMT</pubDate>
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			<title><![CDATA[Intilop (formerly Intelop) corporation's TCP Offload engine IP solution delivers amazing TCP/IP throughput as reported by customers in system level performance testing]]></title>
			<link>http://www.design-reuse.com/go2/422991/87041</link>
			<description><![CDATA[This second generation Customizable Full TCP offload Engine also integrates GEMAC, ARP module, RDMA engines, PLB/405 bus interfaces. It is capable of implementing/accelerating hundreds of simultaneous TCP sessions, delivering 800 % -1500% performance improvement over TCP/IP software implementations. ]]></description>
			<pubDate>Mon, 22 Mar 2010 01:30:00 GMT</pubDate>
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			<title><![CDATA[Imagination Technologies Group plc - Interim Management Statement]]></title>
			<link>http://www.design-reuse.com/go2/422983/87041</link>
			<description><![CDATA[Imagination Technologies is today issuing its Interim Management Statement for the period from 1 November 2009 to 19 March 2010. The Group has continued to see growing and considerable active interest in its technologies across many partners and markets.]]></description>
			<pubDate>Fri, 19 Mar 2010 21:52:00 GMT</pubDate>
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			<title><![CDATA[Intrinsix to Host New England Semiconductor Council Networking Event April 7th]]></title>
			<link>http://www.design-reuse.com/go2/422982/87041</link>
			<description><![CDATA[Intrinsix to Host New England Semiconductor Council Networking Event  with Guest Speaker Norm Armour, VP &amp; GM, Fab 8, Malta, NY, GLOBALFOUNDRIES. ]]></description>
			<pubDate>Fri, 19 Mar 2010 12:29:00 GMT</pubDate>
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			<title><![CDATA[Updated: Sequans' WiMax chip drives Sprint Nextel's first 4G phone]]></title>
			<link>http://www.design-reuse.com/go2/422992/87041</link>
			<description><![CDATA[It turns out that it's Sequans Communications, not Beceem, whose WiMax chip was designed into Sprint Nextel's first WiMax (4G) phone, scheduled to be unveiled next week during the CTIA wireless show. ]]></description>
			<pubDate>Thu, 18 Mar 2010 23:40:00 GMT</pubDate>
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			<title><![CDATA[Lessons for IP reuse]]></title>
			<link>http://www.design-reuse.com/go2/422974/87041</link>
			<description><![CDATA[In the ten years or so that it has taken for design reuse, or design with IP, to go from a niche interest to mainstream chip implementation, teams have developed an understanding of what it can do for them, and how to budget accordingly. However, there are still surprises to be negotiated, as some aspects of design reuse are counter-intuitive, especially when it comes to reusing some piece of IP developed in-house in another chip. Designers ]]></description>
			<pubDate>Thu, 18 Mar 2010 14:55:00 GMT</pubDate>
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			<title><![CDATA[Arteris Announces Support For New ARM AMBA 4 Interconnect Specification]]></title>
			<link>http://www.design-reuse.com/go2/422970/87041</link>
			<description><![CDATA[Arteris today announced support for the new ARM(R) AMBA(R) 4 specification. Arteris and ARM are working together to ensure interoperability between the AMBA 4 AXI(TM) 4 interface protocol and the Arteris Network on Chip (NoC), and are partnering to deliver optimal system performance for SoC designers using AXI4 protocol-compliant IP together with Arteris NoC interconnect technology.]]></description>
			<pubDate>Thu, 18 Mar 2010 12:32:00 GMT</pubDate>
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			<title><![CDATA[Who is largest buyer of chips?]]></title>
			<link>http://www.design-reuse.com/go2/422975/87041</link>
			<description><![CDATA[Who is the largest buyer of chips?]]></description>
			<pubDate>Thu, 18 Mar 2010 02:20:00 GMT</pubDate>
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			<title><![CDATA[Analyst: Tabula won't have immediate market impact]]></title>
			<link>http://www.design-reuse.com/go2/422978/87041</link>
			<description><![CDATA[Programmable logic startup Tabula turned some heads with the announcement earlier this month of its novel architecture and introduction of its first products this week. But the company poses no immediate threat to the dominance of market leaders Xilinx and Altera, according to a Wall Street analyst. ]]></description>
			<pubDate>Thu, 18 Mar 2010 02:15:00 GMT</pubDate>
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			<title><![CDATA[MIPS Technologies and DMP Collaborate on Android(TM) Development for MIPS(R) Architecture]]></title>
			<link>http://www.design-reuse.com/go2/422968/87041</link>
			<description><![CDATA[MIPS and DMP today announced that DMP has become a member of the MIPS Alliance Program for its Android™ on MIPS initiative. The alliance will ultimately enable SoC developers to create MIPS-Based™ SoCs with DMP PICA/SMAPH series graphics IP cores. ]]></description>
			<pubDate>Wed, 17 Mar 2010 21:41:00 GMT</pubDate>
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			<title><![CDATA[ViaSat Announces New 100G Optical Transport Forward Error Correction (FEC) Products and Digital Signal Processing Services]]></title>
			<link>http://www.design-reuse.com/go2/422967/87041</link>
			<description><![CDATA[ViaSat is introducing a family of forward error correction (FEC) products for 100G optical transport. These FEC and digital signal processing (DSP) products, available in either FPGA or ASIC cores, can provide major cost savings over optical compensation techniques, increase optical channel capacity, and extend the range of transmission for optical cables.]]></description>
			<pubDate>Wed, 17 Mar 2010 21:19:00 GMT</pubDate>
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			<title><![CDATA[CoWare Announces Software Development Solution for ARM Cortex-A5 and ARM Cortex-M4 Processor-Based Designs]]></title>
			<link>http://www.design-reuse.com/go2/422965/87041</link>
			<description><![CDATA[CoWare today announced support for Fast Models from ARM for Cortex™-A5 and Cortex-M4 processor IP in CoWare’s SystemC-based software development solution. Customers around the world have already successfully deployed CoWare virtual platforms using Fast Models from ARM. ]]></description>
			<pubDate>Wed, 17 Mar 2010 14:03:00 GMT</pubDate>
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			<title><![CDATA[Innovative Silicon's Z-RAM Technology Meets Low Voltage and Bulk Silicon Requirements of DRAM Memory Manufacturers]]></title>
			<link>http://www.design-reuse.com/go2/422964/87041</link>
			<description><![CDATA[Innovative Silicon today announced two major breakthroughs to its Z-RAM technology. First, bit cell operating voltage has been reduced to below one volt (1V), making it the industry’s lowest-voltage FB memory bit cell and the first to be on-par with traditional DRAM voltages. Second, Z-RAM technology is now constructed on bulk silicon – without the requirement for expensive silicon on insulator (SOI) substrates – by using the 3D transistor structures preferred by the major DRAM manufacturers. ]]></description>
			<pubDate>Wed, 17 Mar 2010 13:54:00 GMT</pubDate>
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			<title><![CDATA[Aldi Nord, Aldi Sud and Lidl Sued for MPEG-2 Patent Infringement]]></title>
			<link>http://www.design-reuse.com/go2/422962/87041</link>
			<description><![CDATA[MPEG LA today announced that several patent holders in MPEG LA’s MPEG-2 Patent Portfolio License have filed separate patent enforcement actions in Landgericht Düsseldorf, Germany against Aldi Nord and Aldi Süd, as well as Lidl Lidl, for infringing patents essential to the MPEG-2 digital video compression standard used worldwide in digital television broadcasting and DVD.]]></description>
			<pubDate>Wed, 17 Mar 2010 09:58:00 GMT</pubDate>
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			<title><![CDATA[Actel Corporation Updates First Quarter Guidance]]></title>
			<link>http://www.design-reuse.com/go2/422961/87041</link>
			<description><![CDATA[Actel today announced that first quarter 2010 revenues are expected to be up sequentially four percent to eight percent. The previous guidance was up two percent to six percent.]]></description>
			<pubDate>Wed, 17 Mar 2010 09:55:00 GMT</pubDate>
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			<title><![CDATA[NEC Electronics and Renesas Announce the New Organizational Structure and Personnel Changes Following Merger]]></title>
			<link>http://www.design-reuse.com/go2/422958/87041</link>
			<description><![CDATA[NEC Electronics and Renesas Technology  today announced the new organizational structure and personnel changes of Renesas Electronics, the new integrated company that will be formed on April 1, 2010 when the business integration of the two entities is completed.]]></description>
			<pubDate>Tue, 16 Mar 2010 14:11:00 GMT</pubDate>
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			<title><![CDATA[Xilinx Demonstrates Cost and Power Reductions for 40G OTN Muxponder With Partial Reconfiguration Technology]]></title>
			<link>http://www.design-reuse.com/go2/422957/87041</link>
			<description><![CDATA[Xilinx today announced it will demonstrate the latest breakthrough 40-Gigabit OTN developments for muxponder applications. The demonstration combines proven partial reconfiguration technology from Xilinx with OTN IP solutions from Avalon to significantly reduce downtime and lower the bill of materials (BOM) cost and power consumption of multi-port (channel) networks. ]]></description>
			<pubDate>Tue, 16 Mar 2010 14:08:00 GMT</pubDate>
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			<title><![CDATA[ARM to Reshape the Smartcard Market with Industry's Smallest and Most Energy-Efficient Securcore SC000 Processor]]></title>
			<link>http://www.design-reuse.com/go2/422956/87041</link>
			<description><![CDATA[ARM today announced the launch of the highly compact and energy-efficient ARM® SecurCore™ SC000™ processor, designed specifically for the highest volume smartcard and embedded security applications.]]></description>
			<pubDate>Tue, 16 Mar 2010 14:01:00 GMT</pubDate>
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			<title><![CDATA[Topscomm Selects Accent for China Smart Grid Powerline Communication Applications]]></title>
			<link>http://www.design-reuse.com/go2/422954/87041</link>
			<description><![CDATA[Accent and Topscomm today announced that Accent will provide a highly-integrated SoC device featuring a complete solution for China Smart Grid. The mixed-signal design will integrate a number of key functions, such as a powerful PLC engine, providing Topscomm a cost-effective solution for their Single,Three Phase Power Module products]]></description>
			<pubDate>Tue, 16 Mar 2010 07:19:00 GMT</pubDate>
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