HES-XCVU9P-QDR

fpga boards, fpga board, fpga development board

Capacity

The HES-XCVU9P-QDR board with Xilinx Virtex UltraScale+ XCVU9P FPGA enables High Performance Computing (HPC) solutions with a need for high-bandwidth and low-latency communication through QSFP28. The customizable FPGA combined with QDR-II+ or DDR4 memory modules provides high throughput for software acceleration, data processing, telecommunications, and more. The PCIe x16 half-length low-profile board easily fits into enterprise rack systems for maximum performance density.

 

The board is available in two memory configurations:

  1. 432 Mb QDR-II (3x 144 Mb)
  2. 144 Mb QDR-II with 32Gb DDR4 (2x 16Gb)

Main FPGA Resources

XCVU9P

Logic Cells

2,586,150

Total Block RAM (Mb)

75.9

UltraRAM (Mb)

270

DSP Slices

6,840

Clocking

There are four (4) general-purpose clocks (100MHz, 200MHz, 300MHz, and 400MHz) available to the FPGA, three (3) dedicated clock oscillators with buffers for the QDR-II memory, a dedicated clock generator for the PCIe interface, and up to two (2) i2c programmable oscillators for the QSFP28 interfaces. Clock distribution and routing has been designed to assure a high level of signal integrity.

Hosting & Interfaces

A standard connection is established with a workstation or server through the board's PCIe x16 interface. Aldec provides the Hes.Asic.Proto software package with necessary drivers and utilities for programming and communication with the board. Power is supplied by a standard 6-pin PCIe power cable. Several i2c devices are also available, including two EEPROM memories, a temperature sensor, and a current monitor which all share the i2c bus. Each QSFP28 cage supports 100Gb Ethernet connections for high-speed communication.

fpga boards, fpga board, fpga development boardBLOCK DIAGRAM

HES-XCVU9P-QDR

FPGA & Capacity

  • Main FPGA: Virtex UltraScale+ XCVU9P-FLGB2104
    • 702 Total I/O (324 Differential I/O)
    • 76 GTY 32.75 Gb/s transceivers
    • 2,586,150 Logic Cells
    • 75.9 Mb Total Block RAM
    • 270 Mb Total UltraRAM
    • 6,840 DSP Slices

Memory Resources

  • 3x QDR-II+ (144 Mb each, total 432 Mb) Memory OR 1x QDR-II+ (144 Mb) with 32Gb DDR4 (2x 16Gb)
  • 2x QSPI (512 Mb each, total 1024 Mb) Flash Memory

Flexible Clocking

  • 4 Oscillators (100MHz, 200MHz, 300MHz and 400MHz)
  • 3 Clocks (200MHz) for memory interface
  • Dedicated clock buffer for PCIe interface
  • Programmable oscillators for QSFP28

Interfaces & Hosting:

  • 2x 100 Gb/s QSFP28
  • PCIe x16 Gen3 endpoint
  • USB-to-JTAG connector
  • I2C devices:
    • 2x 64Kb (total 128 Kb) EEPROM (24AA64T-I_MNY)
    • Temperature sensor (SI7055-A20-IM)
    • Current monitor (INA219)

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