This PR upstreams support for the Arm Morello architecture (for aarch64)

The target specification is the first Morello release (version A.f):
https://developer.arm.com/documentation/ddi0606/A-f

A new variant has been created: "-variant morello", both for diy7 and
for herd7. For diy7, new annotations have been added in order to deal
with Morello capabilities:

Ct for morello tags
Cs for morello seal (object type)
P, A, Q and L annotations can be suffixed with "c" to handle
capabilities
More information can be found in the individual commit messages.

The patchset passed "pre-commit run --all-files" as well as the
regression tests currently in PR #81 with "make test".

* [morello] Add infrastructure

Add morello variant. Enabling morello variant also enables mixed
variant. Because the implementation of the morello tag uses a separate
memory location, the execution of herd is faster that way. Using morello
without mixed hasn't been fully implemented and would output incorrect
results.

Add 128-bit size (S128 in MachSize and V128 for AArch64)

Add Capability registers for AArch64

Parse morello initializations

* [morello] Add capability constants

They hold a boolean for the tag and a 128-bit value for the rest of the
capability.

Arithmetic operations modifying the capability reset the tag to false.

* [lib] Add morello

Add a number of morello instructions. Some of which are not particularly
useful at the moment given that addresses are represented as strings and
not numerical values.

This patch includes the implementation of the tag, permissions and
object type of capabilities. It doesn't include their bounds and flags.
When using morello, the only implemented instruction set is C64.

Add the necessary operations on Value to implement those instructions.

Add the possibility to use unary and binary operations on Symbolic.
Those operation will only make use of the new "capability" field of
Symbolic values, and won't have an effect on non-morello variants.

* [herd] Expose used value in lift_memop

This allows to perform checks on both the address and the value used for
memory accesses.

* [herd] Add a morello specific CAS semantic

This is a temporary implementation that should be unified with the
baseline CAS in the future. It uses choiceT instead of altT in order to
get a correct behavior with the morello tag memory location.

* [herd] Allow delay of non-singleton events

Not used for now, but might be useful at some point.

* [herd] Add morello

Add morello instructions

Adapt data processing to fit 128-bit registers

Add read/write of capabilities from/to registers and memory

Add checks on memory accesses and add permissions to memory operations

Enable initialization of capability tag memory location

* [gen] Fix memtag generation

Warn instead of failing an assert when a Tag annotation is used on xload
or xstore. That allows the use of "T" in a relaxlist without failure.

* [AArch64 gen] Add an optional annotation modifier

This patch adds the means to modify the implementation of some
annotations without interfering with their nature. The modification is
done by chosing and adding a letter to the annotation. For example, for
AArch64, using the morello variation of LDAR is done by using "Ac"
instead of "A".

* [gen] Add is_addr

* [gen] Add morello

Add capability annotations for tag "Ct" and seal "Cs". Those annotations
correspond to their own Banks, behaving similarly to Ord.

A situation of potential Fault is created when using those annotations
together with DpAddr. The result of the preceding read is used to modify
the address so that it will fault if different from the expected value.

Implement the addition of the optional annotation modifier for morello
capabilities.