Product Overview

Complete Clock Domain Crossing Sign-Off

Meridian CDC

Meridian CDC is the fastest, highest capacity, and lowest noise clock domain crossing sign-off solution in the industry — and the only solution that enables all aspects of CDC sign-off.

It can perform multimode sign-off, allowing all possible clocking modes to be covered in a single run with only one setup. Its hierarchical flow delivers a tremendous productivity boost with flat CDC accuracy.

Meridian CDC is also the simplest-to-use CDC solution, with integrated debug and smart reporting for fast sign-off.

Precision Reset Domain Crossing Sign-Off

Meridian RDC

Meridian RDC is the fastest, most precise, and the most comprehensive reset domain crossing sign-off solution in the market. It performs unique functional static analysis to ensure that signals crossing reset domains work reliably.

Among the numerous verification tasks it performs, Meridian RDC, most importantly, identifies metastability problems arising from software and/or low-power resets and their possible impact throughout the design.

Design Initialization Sign-Off

Meridian RXV

Meridian RXV is an X-propagation sign-off tool for accurate initialization analysis, reset optimization, and testbench-independent X-optimism correction. Using high-performance formal analysis, it determines the flip-flops initialized by the design’s reset scheme, highlights uninitialized flip-flops, and reports flip-flops where initialization is not functionally required. Reset optimization suggests how the desired initialization can be achieved with fewer reset flip-flops. X-optimism identification ensures accurate RTL simulation that prevents critical bugs from being masked.

Multimode DFT Sign-Off

Meridian Multimode DFT

Meridian Multimode DFT is a high-capacity, multimode DFT static sign-off tool. Its comprehensive set of fine-grained DFT rules help designers to rapidly identify design violations and improve scan testability and coverage. Meridian DFT is deployed throughout the design process: 1) during RTL design, as part of addressing asynchronous set/reset, clock and connectivity issues early, 2) after scan synthesis, to check for scan chain rule compliance, and 3) following place & route to assess and correct issues with scan-chain reordering or netlist modification.

Connectivity & Glitch Sign-Off

SafeConnect

SafeConnect connectivity & glitch sign-off tool enables early RTL and gate-level netlist sign-off for IP blocks or across SoCs. Design & verification engineers quickly define connectivity rules and glitch checks for various source-destination types.

SafeConnect’s high-capacity static analysis is about ten times faster than other approaches — with low noise reporting, and integrated debug. It is the only solution in the industry that enables both connectivity rules and glitch checking.

Common Infrastructure

iDebug

iDebug is the state-of-the-art debugging environment for its suite of products for the verification of digital designs. iDebug provides an intuitive debugging experience that is universal across all Real Intent tools. It employs a database for the intelligent hierarchical analysis of design intent. It includes an integrated visualization capability, iVision, that provides design source browser, schematic and waveform visualization. The intent analyses of iDebug distinguish the root cause of issues, and minimize iterations and debug time, enabling powerful sign-off mechanisms.