Abstract
We present an integrated fractional-N low-noise frequency synthesizer for satellite applications. By using two integrated VCOs and combining digital and analog tuning techniques, a PLL lock range from 8 to 12 GHz is achieved. Due to a small VCO fine tuning gain and optimized charge pump output biasing, the phase noise is low and almost constant over the tuning range. All 16 sub-bands show a tuning range above 900 MHz each, allowing temperature compensation without sub-band switching. This makes the synthesizer robust against variations of the device parameters with process, supply voltage, temperature and aging. The measured phase noise is −87 dBc/Hz and −106 dBc/Hz at 10 kHz and 1 MHz offset, respectively. In integer-N mode, phase noise values down to −98 dBc/Hz at 10 kHz and −111 dBc/Hz at 1 MHz offset, respectively, were measured.
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Acknowledgments
This work was supported by the European Space Agency (ESA) and the German DLR (Deutsches Zentrum für Luft- und Raumfahrt). The authors thank the IHP technology team for the fabrication of the test chips.
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Herzel, F., Osmany, S.A., Hu, K. et al. An integrated 8-12 GHz fractional-N frequency synthesizer in SiGe BiCMOS for satellite communications. Analog Integr Circ Sig Process 65, 21–32 (2010). https://doi.org/10.1007/s10470-010-9454-z
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DOI: https://doi.org/10.1007/s10470-010-9454-z