D&R News Alert
June 2nd, 2025


Welcome to the issue of June 2nd, 2025 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

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Foundry and Foundry Ecosystem News
■ Making Technology Real: GlobalFoundries' Vision for the Future
Design Platform
■ Arteris Bridges Hardware-Software Gap with New EDA Tool
■ Automating NoC Design to Tackle Rising SoC Complexity by Arteris
Analog IP
■ 12-bit, 5MS/s SAR ADC IP Core for Ultra-Low Power Precision Applications: T2M Unveils New IP
Movellus
Aeonic Insight™ PDN IQ
• Transistor-level PDN visibility
• PDN telemetry and onboard analytics across the silicon lifecycle
• Cross-trigger matrix interface for sophisticated tracing, including look-behind capability
• Process portable
Learn More >>

Memory Subsystem
■ AI memory chip guru to unveil road map for next-generation HBMs
RISC-V
■ CEA Backs RISC-V for Sovereign, Scalable Computing
New!
 ❖ MCU Platform for Industrial Applications - IQonIC Works

Artificial Intelligence
■ HPC Innovator Taps Aion Silicon for $12M RISC-V Accelerator Program
■ Imec ITF World 2025: The hardware horizon for AI
Media IP
■ Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA
Partner News
■ Alphawave IP extends Qualcomm PUSU deadline for third time
■ Synopsys Posts Financial Results for Second Quarter Fiscal Year 2025
■ Keysight Announces Executive Leadership Transitions and New Appointments
■ Chevin are proud to be awarded runner-up of Arm Silicon Startups Contest 2025
Business News
■ Trump Blocks Chip Design Software Firms From Selling In China





Chips'n media

WAVE6031 High Performance Video Decoder IP
  • Supports HEVC, AV1, H.264, VP9 upto 8K
  • Extremely low HOST CPU load & FBC to save bandwidth
  • Support 3rd party frame compression I/F (AFBC, PVRIC)
  • Versatile Post-processing function
>> MORE ABOUT WAVE6031


PCIe 5.0 PHY IP for SF5
• Physical Coding Sublayer (PCS) block with PIPE interface
• Support PCIe 4.0, 3.1, 2.1, 1.1 encoding, backchannel initialization

What they said at
IP SoC Silicon Valley 25

Interview with Ook Kim - CEO - 4lynx, Inc.

Interview with Hoyeon Jeon - CEO - ITDA Semiconductor Co., Ltd.

Welcome to the IP soc community
Gabrièle Saucier, CEO & Founder, Design and Reuse

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