D&R News Alert
June 23rd, 2025


Welcome to the issue of June 23rd, 2025 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Performance Thru Power Efficiency
Analog Bits
The Industry Leader in Low-Power
Mixed Signal IP, down to 2nm
See us at DAC

Learn more on SemiWiki >>
Analog Bits

Foundry and Foundry Ecosytem News
■ Rapidus announces collaboration with Siemens for 2nm semiconductor design
■ TSMC’s Phenomenal 2nm Yield Rates Would Likely Put Alternatives From Samsung & Intel Foundry Way Behind; Apple, NVIDIA & AMD to Be Major Customers
■ Imec and Tokyo Electron extend partnership to accelerate the development of beyond-2nm nodes
Chiplets
■ Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets
■ BOS Joins VESA and UCIe to Advance Global Standards in Display and Chiplet Technology
■ QuickLogic Joins Intel Foundry Chiplet Alliance
■ The Chiplet Economy: Three Pillars for Semiconductor Success
Analog IP
■ True Circuits Introduces the Low-jitter Digital Ultra+ PLL at the Design Automation Conference
Interface IP
■ I3C: The Next-Generation Serial Communication Bus
Products
 ❖ MCU core with high-performance FPU (32 or 64 bit) - by Syntacore

Multimedia
■ CAST Launches Multi-Channel DMA IP Core Ideal for Streaming Applications 
■ Cadence Launches Cache-Coherent HiFi 5s SMP for Next-Gen Audio Applications - By Cadence Design Systems, Inc.
Security IP
■ Why Hardware Security Is Just as Critical as Software Security in Modern Systems - By Synopsys, Inc.
Wi-Fi 7 (802.11be), Advanced RF Transceiver Semiconductor IP Core
• Leaders in Low Power Wireless RF IP Cores
• 12nm, 22nm, Leading Foundries
• 6/5/2.4 GHz, 2×2, 4096 QAM, 160 MHz
• Hot IP: Wi-Fi 6/BT, BT/BLE, GNSS, SDR RF IP

Artificial Intelligence
■ Siemens turbocharges semiconductor and PCB design portfolio with generative and agentic AI
■ Launch of BrainChip Developer Hub Accelerates Event-Based AI Innovation on Akida™ Platform with Release of MetaTF 2.13
■ 3 Trending Sessions Led by Veriest at DAC 2025
Automotive
■ Certified Automotive Ethernet, CAN XL, and LIN IP Cores: Proven, Qualified, and Ready for Seamless Integration
■ Why Standardized SerDes Interfaces Are Essential for In-Vehicle Networks
Partner News
■ QuickLogic to Exhibit at Chips to Systems Conference (DAC) 2025
Business News
■ Ireland’s “Silicon Island” strategy could boost Europe’s analog ecosystem






Synopsys 112G Ethernet PHY IP for TSMC N6
• Optimized for performance, power, and area
• Includes one, two, or four full-duplex PAM-4 transceivers...

What they said at
IP SoC Silicon Valley 25

Interview with Steven Brightfield - Chief Marketing Officer - BrainChip Inc.

Interview with Dana Neustadter - Sr. Director of Product Management Security IP - Synopsys, Inc.

Interview with Alexander Mozgovenko - Product Manager - CAST

Interview with Randy Caplan - CEO - Silicon Creations

Interview with Ravi Thummarukudy - CEO - Mobiveil Inc.

Interview with Andy Lee - Vice president, US marketing - Chips&Media, Inc.

Interview with Mahesh Tirupattur - CEO - Analog Bits Inc.

REGISTER:
If this newsletter was forwarded to you by a colleague, you can have it sent directly to you at no cost. To register for D&R SoC News Alert, go to:

UPDATE YOUR PROFILE / UNSUBSCRIBE :
You are subscribed as and you receive this Alert in html format.

* If you wish to unsubscribe, you can do it there: