D&R News Alert
August 4th, 2025


Welcome to the issue of August 4th, 2025 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Large Portfolio of Silicon Proven IP’s in 3n, 4/5n and 6/7n FinFets
Analog Bits
 • N3 IP’s Silicon Proven in Test Chips and Customer
   Products
• N2 Test Chips Taped-Out
Check our CEO Interview with SemiWiki >>

Foundry News
■ TSMC Gets 300,000 H20 Chip Order from NVIDIA Amid China Market Boom
■ Intel facing another crossroads: 18A or 14A process node
Chiplets
■ Arm considers stepping up investment in chiplet and solution development
■ Chiplet design basics for engineers
■ Chiplets Are Here—And They’re Reshaping Everything
Design Platform
■ Rapidus adopts Teamcenter for semiconductor lifecycle management
CEVA Ceva-NeuPro-M Scalable NPU IP for Generative AI
• Highest power efficiency AI inferencing for cloud and edge devices
• Up to 7K Token-per-Second/Watt for a Llama 2 & 3.2 7B models
• Up to 400 TOPS per core and fully scalable to 1000+ TOPS
• Full AI SDK and AI frameworks support including TVM and ONNX
Learn More >>>

Security
■ Trust at the Core: A Deep Dive into Hardware Root of Trust (HroT) - By Synopsys
■ Post-Quantum Cryptography: Why Open Source alone is Not Enough for Secure IP Deployment - By PQSecure Technologies
■ X-CUBE-PQC: Why post-quantum cryptography matters already and how STM32 embedded systems are ready for future attacks
Artificial Intelligence
■ Female-founded semiconductor AI startup SixSense raises $8.5M
■ QpiAI Raises $32M to Build India’s First Full-Stack Quantum-AI Platform
Network IP
■ Creonic Releases DVB-S2X Demodulator Version 6.0 with Increased Bitwidth and Annex M Support
■ Ceva Retains Top Spot in Wireless Connectivity IP in Latest IPnest Report
Geolocation IP
■ Advanced GNSS IP Cores (RF + Digital + Software) for Enhanced Positioning, Navigation, & Tracking for Next-Gen Products
Automotive
■ Semiconductor innovations transforming automotive displays
■ What It Will Take to Build a Resilient Automotive Compute Ecosystem
Quantum Computing
■ Keysight Installs World’s Largest Commercial Quantum Control System at AIST’s Leading-Edge G-QuAT Center
Partner News
■ SNUG India 2025: AI, Modular Chips, and India’s Semiconductor Future
■ Rambus Reports Second Quarter 2025 Financial Results
■ Cadence Reports Second Quarter 2025 Financial Results
■ Keysight Announces Date of Third Quarter 2025 Financial Results Conference Call
Business News
■ Intel issues a new warning






Synopsys NVM OTP in TSMC N5A for Automotive
• Memory: 16–128 Kbits (N4P/N5/N5A), up to 256 Kbits (N6/N7)
• Data bus: 32 bits (48 bits without reliability/security features)

What they said at
IP SoC Silicon Valley 25

Tech Trend of Image Signal Process with AI Technology
Jeiff Kim, SVP of Marketing/Sales, BTREE Co. Ltd.

Professional videography ecosystem and APV CODEC
Andy Lee, Vice president, US marketing, Chips&Media, Inc.

The Role and Importance of Interface IP in On-Device AI Semiconductor Design
Pyungsu Han, PhD, VP/ CTO, Qualitas Semiconductor

MIPI (Mobile Industry Processor Interface): Central Nervous System of Automotive Industries
Snigdha Dua,Tejaswari V, Manager,Staff, Synopsys, Inc.

USB4 - Advanced USB Interface for broad market
Hiral Patadiya, Sr. Tech Manager, System Level Solutions, Inc.

Power Management Sensors and LDO for Datacenter, AI and Chiplets
Rolly Baradiya, Circuit Design Engineer, Analog Bits Inc.

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