D&R News Alert
March 16th, 2026


Welcome to the issue of March 16th, 2026 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Mixel has the most comprehensive portfolio of production-ready MIPI PHY IP
• Widest adoption of MIPI D-PHY, C-PHY, and M-PHY in the industry
• Silicon-proven in 12 different nodes and in 9 different foundries
• Now supporting Automotive SerDes Alliance Motion Link (ASA-ML) IP
 Visit mixel.com for more information >>

Foundry News
■ IBM, Lam Research Focus High-NA EUV on Sub-1-nm Nodes
■ Advancing High‑Performance Silicon Photonics and Silicon Germanium (SiGe) for the Next Era of Optical Connectivity
Chiplets
■ Faster and more energy-efficient electronics with 3D chip design
Design Platform
■ AI Chip Design From Heilbronn
RISC-V IP Cores Powering AI & Automotive SOCs
• ASIL-B/D certified IP cores for safety & control systems
• RV32 security core with RVC, optimized for secure boot
• 64-Bit, Dual-issue, 8-stage superscalar with crypto extensions
• High-performance cores for NPU control & AI compute offload

RISC-V
■ RISC-V TDS350N IP Core: A55-Class Performance, AI Acceleration processor for AI and ML Scenarios
Artificial Intelligence
■ Klepsydra Technologies and BrainChip Announce Strategic Partnership to Deliver Heterogeneous AI Runtime for Akida™ Neuromorphic Processors
■ BrainChip Enables the Next Generation of Always-On Wearables with the AkidaTag© Reference Platform
■ Ceva’s NeuPro-Nano NPU Wins Artificial Intelligence Award at embedded world 2026
■ Powering the AI Supercycle: Design for AI and AI for Design
Networking
■ STMicroelectronics propels new era of ultra-wideband technology for automotive and smart device applications
■ Keysight Introduces New 224G Test Solutions to Enable 1.6T Optical Network Validation
■ Flexible Ethernet IP Licensing for Secure, Scalable Silicon Development - by Comcores
Green Electronics

Integrating repairability into the design process of electronic devices ?
The power of Virtual Twins to anticipate repairability during early product design stage

TST            Dassault Systemes

Partner News
■ Credo Acquires CoMira Solutions
■ Silvaco Reports Fourth Quarter and Full-Year 2025 Financial Results
Business News
■ SEMIFIVE Signs Turnkey Design Contract Worth KRW 18,000 Million With AI Semiconductor Fabless Company
■ GlobalFoundries Announces Pricing of Public Secondary Offering and Concurrent Share Repurchase
■ Chip Foundry TSMC Says Its Sales Rose 22% In February
■ Soitec and NSIG to agree extension of licensing framework
■ Reshaping the technology landscape in Europe






Synopsys MIPI M-PHY IP
• Compliant with either the MIPI M-PHY v6.0 or MIPI M-PHY v5.0 or MIPI M-MPHY v4.1 specification as M-PHY Type-I
• Supports MIPI UniPro, JEDEC UFS protocols

What they said at
IP-SoC EU 25

Interview with Oren Katzir - Vice President - Real Intent Inc.

Interview with Oner Hanay - CEO - InCirT GmbH

Unlocking Generative AI at the Edge: How LPDDR enables Scalable & Efficient Intelligence
Sebastien Person, SPE Field Applications Engineering, Rambus, Inc.
Agile Analog

Interview with Chris Morrison - Agile Analog

The Compiler-Free Revolution: Model-Specific ASICs as the Definitive Architecture for Sub-1W Edge AI Accelerators
Richard Wu, General Manager, DeepMentor USA

Protecting Data in Motion with MACsec
Sebastien Person, SPE Field Applications Engineering, Rambus, Inc.

REGISTER:
If this newsletter was forwarded to you by a colleague, you can have it sent directly to you at no cost. To register for D&R SoC News Alert, go to:

UPDATE YOUR PROFILE / UNSUBSCRIBE :
You are subscribed as and you receive this Alert in html format.

* If you wish to unsubscribe, you can do it there: