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MIPI DPHY Gen2 Rx-Only 4 Lanes - TSMC 28HPC, HPM, LP 1.8V, North/South Poly Orientation
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AES Reference Design for Xilinx Processors
This reference design uses Xilinx's CoreConnect PLBv46 bus to connect the AES G3 core to a MicroBlaze embedded processor. Xilinx's PowerPC 440 cores provided in Virtex 5 chips use the same PLBv46 bus as the MicroBlaze.
The design runs on the Xilinx Spartan 3A development kit and demonstrates the AES-G3 core connected to the MicroBlaze processor which communicates with a PC over an ethernet network. A PC application is supplied which can download files to the Spartan 3A board for encryption or decryption in hardware and check the results using a software implementation of AES.
This reference design would be an excellent starting point for many embedded systems which require encryption in hardware.
The design runs on the Xilinx Spartan 3A development kit and demonstrates the AES-G3 core connected to the MicroBlaze processor which communicates with a PC over an ethernet network. A PC application is supplied which can download files to the Spartan 3A board for encryption or decryption in hardware and check the results using a software implementation of AES.
This reference design would be an excellent starting point for many embedded systems which require encryption in hardware.
Features
- Complete reference design for Xilinx Spartan 3A Evaluation Kit
- Spartan 3A board implements an embedded encryption system interfaced to a PC via ethernet
- PC software allows files to be sent to the Spartan 3A board to be encrypted using the AES-G3 core
Deliverables
- VHDL source code for hardware elements, C source code for embedded software and C++ source code for PC application. Supplied in project directories ready to build with Xilinx implementation tools and Microsoft Visual C.
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