SD 3.0 Evaluation Platform

Aizyc SD 3.0 evaluation platform is used to facilitate the
development and evaluation of SD3.0 Host/Device IPs implemented
in Xilinx Spartan 3 FPGA.

This board is designed in a 4-layer with maximum performance,
with respect to signal integrity, speed and high speed design
issues.

This FPGA board plugs into a PCI slot. This gives the flexibility to
interface the FPGA to PCI bus using a PCI core. The PCI interface
is a universal 32-bit interface, supporting both 5V and 3.3V interface
The board is also designed to power up in a stand-alone mode. The
FPGA device used is Xilinx XC3S1500-FG456.

For SD 3.0 Host, the application supported is PCI to SD 3.0 Host
Controller Card.

For SD 3.0 Device, the application being developed is SD Memory Interface employing a NAND Flash/NAND Flash controller IP (Separate daughter card)