Interconnect, D2D, C2C IP Core

Browse Interconnect, D2D, C2C

Chip to Chip (5)

Die-to-die (24)

Intra SoC Connectivity (9)

Network Interconnect (15)

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Nutcracker XSR Connectivity Chiplet

Core and analog logic may not always deploy at the same time in the same process. Maturing high performance analog typically takes longer in moving to...

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CXL (Compute eXpress Link) 3.1 IP

The Panmnesia Compute Express Link (CXL) IP implements all necessary logic for CXL device, host, and switch. The IP supports all features of the CXL 3...

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CXL Controller IP

The Wolley Compute Express Link® (CXL®) 3.1 controller is a highly-configurable design for ASIC and FPGA implementations. It maintains backward compat...