Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3 IP
1
21.0
USB 3.x VIP
SmartDV's USB 3.x Verification IP is a comprehensive solution for verifying SuperSpeed USB interfaces, the high-bandwidth serial bus standard powering...
2
0.0
USB 3.2 with Retimer Verification IP
Truechip's USB3.2 Verification IP with Retimer provides an effective & efficient way to verify the...
3
0.0
USB 3.2 with xHCI & Retimer Verification IP
Truechip's USB 3.2 Verification IP providesan effective & efficient way to verify the components...