Design & Reuse
Catalog of SIP Cores
System on Chip design resources
8759 IP
501
70.0
Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
PQSecure™-CRYSTALS from PQSecure Technologies, LLC. is a set of hardware IP cores designed for various target applications of digital signatures and k...
502
60.0
TSMC CLN16FFGL+ HBM PHY IP
This datasheet describes GUC’s HBM (High Bandwidth Memory) PHY IP, which can be integrated with HBM memory controller to provide HBM functionality. Th...
503
60.0
TSMC CLN5FF HBM PHY IP
This datasheet describes GUC HBM (High Bandwidth Memory) PHY IP, which could be integrated with HBM memory controller to provide HBM functionality. Th...
504
60.0
Multi-Die interLink (GLink 2.3) IP
GUC multi-die interLink (GLink) IP provides world’s best class solution for high-bandwidth, low-power, low-latency multi-channel interconnection in a ...
505
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
506
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
...
507
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
...
508
50.0
DL-based Video Super Resolution Hardware IP
Streaming video accounts for more than 80% of internet traffic, and over 90% of content is streamed in FHD or lower resolutions from a variety of serv...
509
46.6667
Bluetooth Low Energy 6.0 Digital IP
SB1001-CM is a full single-source BLE 6.0 Subsystem IP, consisting of an integrated Controller and Modem....
510
46.6667
Bluetooth Low Energy 6.0 Scalable RF IP
The SB1001 Scalable RF Transceiver IP is designed to maximise Performance per μW across the full range of BLE applications, enabling active Receiver p...
511
46.6667
Bluetooth Low Energy Subsystem IP
SB1001-00 is a full single-source BLE 6.0 Subsystem IP1, consisting of an integrated Controller and Modem paired to a proprietary RF on T22 ULL....
512
45.0
Ncore™ Coherent NoC IP
Built on more than a decade of volume silicon, Ncore™ is silicon-proven coherent NoC IP that is highly configurable, power-efficient, and works with a...
513
45.0
FlexNoC® 5 Interconnect IP
FlexNoC® Interconnect IP by Arteris is used by the world’s top semiconductor design teams as the backbone for on-chip communications in chips that tar...
514
45.0
Power and Clock Generation IP - GlobalFoundries 22FDX
Tightly integrated power management platform with a soft-IP wrapper around Analog / Mixed-Signal hard macros which generate all supply voltages and cl...
515
44.0
CodaCache® Last Level Cache IP
CodaCache® addresses modern design challenges through performance-optimized caching, efficient data access, and power optimization techniques. It also...
516
40.0
Kudelski Labs On-chip Security Enclave - Digital IP delivered as RTL
Kudelski Labs Secure Hardware IP has been designed for chipset manufacturers seeking key protection in their system on chip (SoC/ASIC) solutions, robu...
517
40.0
eUSB2 v2 Verification IP
Truechip's eUSB2V2 Verification IP provides an effective & efficient way to verify the components Supporting eUSB2V2 Revision 1.0 Specification Truech...
518
34.1
Pulsar Video Decoder IP - D301
D301 is the Allegro DVT’s MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) decoder IP solution. The D301 LCEVC decoder IP is optimized for power...
519
31.6
Pulsar Video Decoder IP - D105
Allegro DVT’s AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AVC 1920x1080...
520
31.6
Pulsar Video Decoder IP - D300 Series
D300 Series is the Allegro DVT’s ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers looking t...
521
30.0
CAN FD light responder IP
The FDLR_CAN is a CAN IP module that can be implemented in an ASIC, FPGA, and mixed-signal device. It supports CAN FD light responder communication...
522
30.0
UCIe 3.0 Verification IP
Truechip's UCIe Verification IP offers a streamlined and efficient solution for verifying UCIe components within an IP or SoC. Truechip's VIP fully ad...
523
30.0
PCIe Gen 5 Verification IP
Truechip's PCIe Gen5 Verification IP provides an effective & efficient way to verify the components interfacing with PCIe Gen5 interface of an IP or S...
524
30.0
PCIe Gen 6 Verification IP
Truechip's PCIe Gen 6 Verification IP provides an effective & efficient way to verify the components interfacing with PCIe Gen 6 interface of an IP or...
525
30.0
PCIe Gen 7 Verification IP
Truechip's PCIe Gen 7 Verification IP provides an effective & efficient way to verify the components interfacing with PCIe Gen 7 interface of an IP or...
526
30.0
DDR4 Verification IP
Truechip's DDR4 Verification IP provides an effective & efficient way to verify the components interfacing with DDR4 interface of an ASIC/FPGA or SoC....
527
30.0
Perceptual Video Quality Optimization IP
Today's media streaming market demands optimal quality video at the lowest possible data rate, as you need to enhance service users' viewing experienc...
528
30.0
UFS Host Controller 4.1 IP
The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides comma...
529
30.0
TicoXS | JPEG XS Decoder IP core
JPEG XS has been co-developed by intoPIX and standardized by ISO (ISO/IEC 21122). TicoXS decoder is a visually lossless, ultra-lightweight and ultra-l...
530
30.0
TicoXS | JPEG XS Encoder IP core
JPEG XS has been co-developed by intoPIX and standardized by ISO (ISO/IEC 21122). TicoXS encoder is a visually lossless, ultra-lightweight and ultra-l...
531
30.0
IP platform for intelligence gathering chips at the Edge
Designed to be the solution for an AI compute device right at the Edge, Aion Silicon (formerly Sondrel) new SFA 100 IP reference platform makes creati...
532
30.0
zstd compression and decompression IP core
The zstd (Zstandard) compression algorithm is an advanced, lossless data compression technology. It has quickly become a popular choice for a variety ...
533
30.0
Quad core IP platform with integrated Arm security subsystem
Aion Silicon (formerly Sondrel) has created a powerful, quad core IP platform, the SFA 200, that is ideal for ASIC solutions for remote gathering and ...
534
30.0
NVM Express Host IP Core
The IPM-NVMe_Host core is a verilog IP to be integrated in a FPGA or ASIC design. It fully manages the NVMe and PCIe protocol on the host side without...
535
30.0
LZ4 compression and decompression IP core
The LZ4 compression algorithm is a fast, lossless data compression technology renowned for its high-speed performance and low latency. LZ4 offers impr...
536
29.1
Zinia Pixel Processor IP - PP300 Series
Allegro DVT’s PP300 IP is a flexible Pixel Processor that provides a wide range of processing functions. The PP300 IP offers various system integra...
537
29.1
Prism Video Encoder IP – E100 Series
Allegro DVT’s E100 Series of Encoder IP enables HD/1080P60 resolution encoding up to 5MPixels in a single core. The E100 Series Encoder is built ar...
538
29.1
Prism Video Encoder IP – E300 Series
Allegro DVT’s E300 Series of Encoder IP features a new hardware architecture that minimizes the silicon area while enabling 4K resolution encoding in ...
539
29.1
Prism Video Encoder IP – E301
E301 is the Allegro DVT’s MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) encoder IP solution. The E301 LCEVC encoder IP is optimized for power...
540
29.1
Pulsar Video Decoder IP - D100 Series
D100 Series is the Allegro DVT’s ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers looking t...
541
29.1
Juno Neural Video Processor IP - NVP300 Series
Allegro DVT’s NVP300, AI-based Neural Video Processing IP push video quality to the next level by leveraging the advanced features and benefits of AI ...
542
29.0
USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
The OTS9106 board is a complete FPGA and ARM processor based USB PD Type-C port, featuring the RTL and C source code of the Obsidian Technology OTI910...
543
26.0
HDMI 2.0b IP Core
The Bitec HDMI 2.0b IP Core enables HDMI interconnectivity without the need for external HDMI ASSP devices. Supporting pixel clocks to 600Mhz, the IP ...
544
26.0
HDMI 2.1 IP Core
The Bitec HDMI 2.1b IP Core enables HDMI interconnectivity in FPGA or ASIC devices. Supporting uncompressed video formats to 8K60 4:2:0 and beyond for...
545
26.0
VESA Display Stream Compression (DSC) IP Core
Display Stream Compression offers inter-operable, visually lossless real-time, video compression to satisfy the emerging high bandwidth and high resol...
546
26.0
DisplayPort 1.4a IP Core
DisplayPort heralds a new alternative in video connectivity. Designed to enable low cost direct drive monitors and backed by industry leaders (Intel, ...
547
25.0
TSMC 12nm 16Gbps SerDes IP supporting multiple serial protocols
A high-performance, low-power 16Gbps SerDes IP supporting multiple serial protocols. Integrated PMA and PCS layers with advanced equalization and diag...
548
25.0
DVB-S2 Demodulator IP Core
DVBS2_DEMOD.vhd performs the demodulation based on three tracking loops: carrier tracking (for coherent demodulation), symbol timing tracking, and A...
549
23.3333
PCIe Gen6 Controller
The SignatureIP PCIe Controller IP is a silicon-proven, highly configurable controller designed for high-bandwidth, low-latency connectivity in next-g...
550
23.3333
Cloud-active NOC configuration tool for generating and simulating Coherent and Non-Coherent NoCs
iNoCulator is a cloud-active EDA tool that is used to define the topology of a NoC quickly and easily, configure its parameters and simulate it to mea...