Design & Reuse
3812 IP
1
44.0
CodaCache® Last Level Cache IP
CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...
2
0.0
FlexWay Interconnect IP
FlexWay 5 from Arteris is an essential entry-level IP generator for cost-efficient, high-performance network-on-chip (NoC) designs. It revolutionizes ...
3
0.0
Smart Network-on-Chip (NoC) IP
AI-Enhanced Automation for Smarter SoC Design FlexGen™ by Arteris redefines how SoC designers create Network-on-Chip IP by introducing cutting-edge...
4
0.0
CodaCache Last Level Cache IP
CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...
5
45.0
Magillem Connectivity System Integration Automation
Magillem Connectivity is the centerpiece of a powerful, intuitive, single source of truth design environment. It delivers advanced functionalities to...
6
45.0
Ncore 3 Coherent Network-on-Chip (NoC)
For scalable and area-efficient heterogeneous cache coherent systems. The Arteris Ncore Cache Coherent Interconnect IP offers unparalleled scalabil...
7
45.0
FlexNoC 5 Network-on-Chip (NoC)
Arteris FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of sy...
8
44.0
FlexNoC 5 Option For Scalability and Performance Critical Systems
Arteris IP FlexNoC Performance Option accelerates development of next-generation deep neural network (DNN) and machine learning systems. Automate and ...
9
44.0
FlexNoC Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required t...
10
0.0
Magillem Registers System Integration Automation
Cost-effective and scalable, Magillem Registers offers a memory map view of IPs and systems based on the IP-XACT standard. The Registers approach targ...
11
0.0
FlexNoC 5 Network-on-Chip (NoC)
Arteris FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of sy...
12
0.0
FlexNoC Resilience Package
For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required t...
13
0.0
Empowering Design Quality with Harmony Trace
Harmony Trace by Arteris, the innovative Design Data Intelligence Solution for complex SoC and System-of-SoCs projects. Accelerate quality and functio...
14
200.0
UALink IP Solution with PHY, Controller and Verification IP
The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...
15
200.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
16
200.0
MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
17
200.0
MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
18
150.0
Synopsys 1.6T Ethernet MAC IP
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
19
140.0
Intelligent Sensor and Power Management Platform of ASIC IP for Sensor, Power, and IoT Applications
As falling silicon technology node-size continues to reduce the power consumption and physical space required for any given ASIC design, whole new emb...
20
140.0
vPUF IP for roots of trust and security chips
Learn more about physically unclonable functions (PUF) from ICTK (Kosdaq 456010). ICTK’s vPUF IP uses the unique via hole fingerprint in each semicon...
21
120.0
CFrame60, lossy, lossless FBC compression, decompression IP
The Chips&Media’s CFrame60 is a Lossless & Lossy Frame Compression Hardware IP, designed to significantly reduce memory size, DRAM bandwidth and power...
22
110.0
Ethernet Enterprise Switch/Router IP Core - Efficient and Massively Customizable
Packet Architects offers a series of high speed switching/routing IP cores developed using the unique FlexSwitch tool-chain. This allows us to provide...
23
102.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps
The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
24
102.0
MIPI C-PHY/D-PHY Combo RX IP 4.5Gsps/4.5Gbps in TSMC N7
The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
25
102.0
MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...
26
102.0
Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
27
102.0
Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
28
100.0
1.6T Ethernet PCS IP
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
29
100.0
1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
30
100.0
1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP
The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...
31
100.0
200G and 400G Ethernet PCS IP
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...
32
100.0
800G Ethernet PCS IP
The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...
33
100.0
400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
...
34
100.0
56G Serdes in 7nm bundled with PCie Gen 5 controller IP
New IP for value conscious designers....
35
100.0
CAN XL Controller IP
The CAN XL IP represents a breakthrough, bridging the gap between CAN FD and 100Mbit Ethernet. Supporting data rates up to 20 Mbit/s and data fields u...
36
100.0
PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
37
100.0
PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
Multiprotocol low latency, low power SERDES IP....
38
100.0
UCIe PHY & D2D Adapter
Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...
39
100.0
Secure-IC Securyzr(TM) Cyber Escort Unit IP provides real time detection of sero day attacks on processor
Secure-IC Securyzr™ Cyber Escort Unit is designed to fill the security gap between software cybersecurity and hardware by escorting step by step the p...
40
100.0
eFPGA IP - 100% third party standard cells
For ASIC and SoCs designers who need fast, right-the-first time design and fast time to volume, Menta is unique in our ability to deliver proven eFPGA...
41
100.0
eFPGA IP as a synthesizable RTL core
For ASIC and SoCs designers who need fast, right-the-first time design and fast time to volume, Menta is unique in our ability to deliver proven eFPGA...
42
100.0
The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
SuperFlash® is SST’s patented and proprietary NOR flash technology. With 80B+ devices shipped, SuperFlash is the non-volatile memory of choice for emb...
43
100.0
The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
44
100.0
MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan's MIPI C-PHY is designed and compliant with latest MIPI C-Phy Standards. The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited ch...
45
100.0
MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.2 improves throughput over a bandwidth limited channel, allowing more data without in...
46
100.0
MIPI D-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan delivers you MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete G...
47
100.0
RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enh...
48
100.0
Embedded Security Modules for HDCP 2.3 on HDMI IP
The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...
49
100.0
LPDDR5 DDR Memory Controller IP
MEMTECH’ Olympus Mons-L Series Memory Controller (CHIPLET READY) is a specialized hardware component that manages communication between a processor (s...
50
100.0
NPU IP family for generative and classic AI with highest power efficiency, scalable and future proof
NeuPro-M™ redefines high-performance AI (Artificial Intelligence) processing for smart edge devices and edge compute with heterogeneous coprocessing, ...