1 10.0

Camera ISP IP (Competitive Performance) - ZELKOVA Zelkova is a comprehensive ISP IP that includes many functionalities for image processing applications. It is optimized for low light environment appl...

2 10.0

Camera ISP IP (High Performance) - METASEQUOIA METASEQUOIA is a comprehensive ISP IP that includes many functionalities for image processing. It is optimized for high resolution and low light envir...

3 9.0

Camera High Dynamic Range IP - PINE The PINE with HDR functionality receives a fused Multi-exp. image from the sensor and processes it internally to extend the Dynamic Range of the image...

4 8.0

Camera 3DNR IP - AMUR (ME based) AMUR is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It is optimized for low light environment. AMUR uses Motion E...

5 8.0

Camera 3DNR IP - VINI (MA based) VINI is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It realizes high performance with low gate size and memory us...

6 7.0

Camera LDC (De-warp) IP - GINKGO GINKGO is an Lens Distortion Correction IP capable of up to 192° angle correction. It comes with factors that can adjust zoom and un-distortion streng...

7 7.0

Camera Scaler IP - DSCALE DSCALE is an IP that reduces the input image to a specified output size. DSCALE can simultaneously process one input image into four different reduce...

8 6.0

Camera Demosaicing IP - DAISY (RCCC) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

9 6.0

Camera Demosaicing IP - LOTUS (RCCB) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

10 6.0

Camera Demosaicing IP - ROSE (RGB-IR) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

11 5.0

DDI Color Enhancement (CLREN) IP BTREE's Color Enhancement IP modifies or emphasizes color by controlling Saturation/Luminance/Hue. BTREE's Color Enhancement can only adjust the color...

12 5.0

DDI High Dynamic Range IP HDR improves the visibility of the output image compared to the input images by increasing the contrast of the image/video reproduced on the display. ...

13 4.0

DDI Scaler IP - BSCALE BTREE’s BSCALE enlarges or reduces the input video to fit the panel size. Polynomial Interpolation (PI) is the basic algorithm, and also various metho...

14 4.0

DDI Scaler IP - MSCALE BTREE’s MSCALE enlarges the input video to fit the panel size. Bi-Linear interpolation is the basic algorithm, and also various methods such as sharpn...

15 0.0

VDC-M 1.2 Decoder The BTREE VDC-M 1.2 Decoder IP Core fully complies with VESA VDC-M 1.2 (Display Compression). Its visually lossless compression performance is up to 5...

16 0.0

VDC-M 1.2 Encoder The BTREE VDC-M 1.2 Encoder IP Core fully complies with VESA VDC-M 1.2(Display Compression). Its visually lossless compression performance is up to 5:...

17 0.0

DDI Always on Display (GIF Decoder) AOD (GIF decoder) is an IP that enables animated images or videos to be displayed on an AOD (Always-On Display) mode screen....

18 0.0

DDI Sub Pixel Rendering Sub-pixel Rendering creates a new R/G/B to fit the pixels of pentile structure. The interpolation is used to calculate the new R/G/B value....

19 50.0

512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...

20 20.0

JPEG Codec Full HD(YUV422) 30fps@63MHz. (2Sample/clk) The KJN-F4 conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA....

21 20.0

Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk) KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...

22 10.0

64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...

23 10.0

64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...

24 10.0

256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...

25 10.0

768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....

26 10.0

16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...

27 10.0

SAS Initiator, 12G, 4 Ports, 48 Gbps The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...

28 10.0

MIPI CSI-2 Receiver for FPGA MIPI CSI-2 Rx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processor....

29 10.0

MIPI CSI-2 Transmitter for FPGA MIPI CSI-2 Tx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processer...

30 10.0

Visibility Improver IP “LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), and dark images due t...

31 10.0

4Kx16 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process The AT4K16U110MAE0DA is organized as a 4K-bits by 16 one-time programmable memory. This is a kind of non-volatile memory fabricated in UM- L110AE proc...

32 10.0

4Kx32 Bits OTP (One-Time Programmable) IP, TSM- 40nm ULP 1.1V/2.5V Process The AT4K32T40ULP7ZC is organized as 4K-bits by 32 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP stand...

33 10.0

4Kx8 Bits OTP (One-Time Programmable) IP, GLOBA-FOUNDR---® 22nm FDX 0.8V/1.8V Process The AT4K8G22FDX0AA is organized as a 4K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in GLOBA-FOUNDR---® ...

34 10.0

8Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process The AT8K8V150BCD0DB is organized as an 8K-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 0.15μm BCD GII...

35 10.0

1x64 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 22nmFDX 0.8V/1.8V Process The AT1X64G22FDX0AA is organized as a 1 by 64 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in Globa-Foundr--- 22nm FD...

36 8.0

HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...

37 8.0

Serial ATA Bridge Controller (1.5, 3.0, 6.0 Gb/s) The Serial ATA Bridge IP Core provides an method to manipulate data between two SATA endpoints. High Performance, with maximum bandwidth data transfer...

38 8.0

Serial ATA Gen 3 Host Controller (1.5, 3.0, 6.0 Gb/s) The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The ...

39 8.0

Serial ATA Host Controller (1.5, 3.0, 6.0 Gb/s) 5th Generation The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The ...

40 8.0

AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface. This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...

41 8.0

ZLIB compatible compression and decompession, with DMA and AXi interface This is a high performance, small footprint ZLIB compatible IP Core. It features 3 DMA engines, AXI interconnect and separate clocks for AXI interface...

42 7.0

SAS Initiator, 12G, 4 Ports, 48 Gbps, AXI Interface The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...

43 7.0

SAS Initiator, 12G, Wide, 4 Ports, 48 Gbps The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...

44 6.0

2-ch 16-bit stereo Audio ADC ...

45 6.0

2-ch 16-bit stereo Audio ADC ...

46 6.0

2-ch 24-bit 192KSPS Audio DAC ...

47 6.0

2-ch 24-bit 192KSPS Audio DAC ...

48 6.0

2-ch 24-bit 192KSPS Audio DAC; TSMC 40nm LP ...

49 6.0

10-bit dual-port 30MHz ~ 85MHz LVDS Tx; ...

50 6.0

10/100 Base-TX Fast Ethernet PHY; SMIC 40nm LL SP-10_100_Ethernet-S40LL is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream to...