Design & Reuse
1298 IP
1
0.0
All Silicon Charge Pump for X-FAB 180nm
Fraunhofer IPMS offers an all silicon charge pump module which does not need any further external components. Efficiency is up to 97%....
2
0.0
Ultra low power temperature sensor for X-FAB 350nm
Fraunhofer IPMS offers an ultra low power analog temperature sensor generating temperature dependent clock outputs. Optional digital counter logic is ...
3
0.0
CMC Microsystems - technology research support
CMC helps researchers and industry across Canada's National Design Network® develop innovations in microsystems and nanotechnologies. The scope of se...
4
0.0
CMC Microsystems - Virtual Incubator Environment
Virtual Incubator Environment Program for start-ups to access a bundle of tools and technologies to accelerate their design of innovative products. A...
5
0.0
CMC Microsystems - Xanadu Quantum Sandbox
The goal of this program is to identify and begin to explore exciting new applications for Xanadu's near-term quantum computers, which carry out a cal...
6
0.0
EMSA5-FS
EMSA5-FS is a 32-bit, in-order, single-issue, five-stage pipeline processor supporting the open standard RISC-V instruction set architecture (ISA). It...
7
0.0
Energy Harvesting module with AC-DC converter for X-FAB 180nm
Fraunhofer IPMS offers an energy harvesting module with integrated AC-DC converter and voltage limitation. Energy can be harvested from piezoelectric ...
8
0.0
Fraunhofer IPMS - Research and development services
The Fraunhofer IPMS offers various cooperation possibilities along the entire value chain to its customers. Feasibility studies are the first step if ...
9
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
10
20.0
JPEG Codec Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4 conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA....
11
20.0
Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...
12
10.0
64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process
The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...
13
10.0
64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...
14
10.0
256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process
The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...
15
10.0
768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....
16
10.0
16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process
The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...
17
10.0
Camera ISP IP (Competitive Performance) - ZELKOVA
Zelkova is a comprehensive ISP IP that includes many functionalities for image processing applications. It is optimized for low light environment appl...
18
10.0
Camera ISP IP (High Performance) - METASEQUOIA
METASEQUOIA is a comprehensive ISP IP that includes many functionalities for image processing. It is optimized for high resolution and low light envir...
19
10.0
SAS Initiator, 12G, 4 Ports, 48 Gbps
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
20
10.0
MIPI CSI-2 Receiver for FPGA
MIPI CSI-2 Rx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processor....
21
10.0
MIPI CSI-2 Transmitter for FPGA
MIPI CSI-2 Tx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processer...
22
10.0
Visibility Improver IP
“LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), and dark images due t...
23
10.0
4Kx16 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process
The AT4K16U110MAE0DA is organized as a 4K-bits by 16 one-time programmable memory. This is a kind of non-volatile memory fabricated in UM- L110AE proc...
24
10.0
4Kx32 Bits OTP (One-Time Programmable) IP, TSM- 40nm ULP 1.1V/2.5V Process
The AT4K32T40ULP7ZC is organized as 4K-bits by 32 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP stand...
25
10.0
4Kx8 Bits OTP (One-Time Programmable) IP, GLOBA-FOUNDR---® 22nm FDX 0.8V/1.8V Process
The AT4K8G22FDX0AA is organized as a 4K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in GLOBA-FOUNDR---® ...
26
10.0
8Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process
The AT8K8V150BCD0DB is organized as an 8K-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 0.15μm BCD GII...
27
10.0
1x64 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 22nmFDX 0.8V/1.8V Process
The AT1X64G22FDX0AA is organized as a 1 by 64 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in Globa-Foundr--- 22nm FD...
28
9.0
Camera High Dynamic Range IP - PINE
The PINE with HDR functionality receives a fused Multi-exp. image from the sensor and processes it internally to extend the Dynamic Range of the image...
29
8.0
Camera 3DNR IP - AMUR (ME based)
AMUR is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It is optimized for low light environment. AMUR uses Motion E...
30
8.0
Camera 3DNR IP - VINI (MA based)
VINI is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It realizes high performance with low gate size and memory us...
31
8.0
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...
32
8.0
Serial ATA Bridge Controller (1.5, 3.0, 6.0 Gb/s)
The Serial ATA Bridge IP Core provides an method to manipulate data between two SATA endpoints. High Performance, with maximum bandwidth data transfer...
33
8.0
Serial ATA Gen 3 Host Controller (1.5, 3.0, 6.0 Gb/s)
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The ...
34
8.0
Serial ATA Host Controller (1.5, 3.0, 6.0 Gb/s) 5th Generation
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The ...
35
8.0
AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...
36
8.0
ZLIB compatible compression and decompession, with DMA and AXi interface
This is a high performance, small footprint ZLIB compatible IP Core. It features 3 DMA engines, AXI interconnect and separate clocks for AXI interface...
37
7.0
Camera LDC (De-warp) IP - GINKGO
GINKGO is an Lens Distortion Correction IP capable of up to 192° angle correction. It comes with factors that can adjust zoom and un-distortion streng...
38
7.0
Camera Scaler IP - DSCALE
DSCALE is an IP that reduces the input image to a specified output size. DSCALE can simultaneously process one input image into four different reduce...
39
7.0
SAS Initiator, 12G, 4 Ports, 48 Gbps, AXI Interface
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
40
7.0
SAS Initiator, 12G, Wide, 4 Ports, 48 Gbps
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
41
6.0
2-ch 16-bit stereo Audio ADC
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42
6.0
2-ch 16-bit stereo Audio ADC
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43
6.0
2-ch 24-bit 192KSPS Audio DAC
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44
6.0
2-ch 24-bit 192KSPS Audio DAC
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45
6.0
2-ch 24-bit 192KSPS Audio DAC; TSMC 40nm LP
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46
6.0
10-bit dual-port 30MHz ~ 85MHz LVDS Tx;
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47
6.0
10/100 Base-TX Fast Ethernet PHY; SMIC 40nm LL
SP-10_100_Ethernet-S40LL is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream to...
48
6.0
10/100 Base-TX Fast Ethernet PHY; TSMC 55nm GP
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49
6.0
10/100 Ethernet PHY for TSMC 22nm ULP
10 100ETHERNET-T22ULP18 is a single-port DSP-based Fast Ethernet Transceiver. It contains all the ac?tive circuitry required to convert data stream to...
50
6.0
10/100 Ethernet PHY, TSMC 28nm HPC+
-10 100ETHERNET-T28HPCP18 is a single-port DSP-based Fast Ethernet Transceiver. It contains all the ac?tive circuitry required to convert data stream ...