Design & Reuse
5161 IP
101
0.0
Small and Fast Security Solutions for Critical Automotive Applications
Today's vehicles are equipped with multiple microcontrollers that control critical safety and performance functions in a vehicle. When considering...
102
0.0
Robust Embedded Security Solutions for Industrial Applications
One of the most critical requirements for industrial IoT applications is to provide security for devices that must be controlled remotely. For example...
103
0.0
Root of Trust Solutions
Providing a hardware-based foundation for security, Rambus offers a portfolio of robust Root of Trust solutions, ranging from richly featured military...
104
0.0
System Level Solutions - ASIC/FPGA/SoC Design Services
SLS works with you to optimize our designs, keeping an eye on the bottom line. SLS products and services include: ASIC/FPGA/SoC Design Services Hi...
105
0.0
System Level Solutions - High Speed PCB Design Services
SLS is a turnkey provider of a range of innovative PCB designs starting right from high-speed board designs, to multi-layered and multi CPU board desi...
106
9.0
Customizable Video Input Controller with color space conversion
CVI is a fully Customizable Video Input controller IP core. The video input controller can be applied to e.g. FPGA systems with a resource optimized, ...
107
8.0
2.5D GPU / 2D & 3D Vector Graphics (OpenVG) Accelerator - D/AVE HD
D/AVE HD is a cost-efficient, highly configurable IP core for 2D and 3D graphics applications. The variants of the core are available for FPGAs, ASICs...
108
8.0
2D GPU / Vector Graphics Accelerator - D/AVE 2D
The D/AVE 2D is a compact, flexible and efficient 2D Vector Engine providing HW acceleration to CPU based graphics applications. D/AVE offers high qu...
109
8.0
2D/3D OpenGL ES 2.0 vector graphics IP core - D/AVE NX
D/AVE NX is the latest and most powerful addition to the D/AVE family of rendering cores. It is the first IP to bring 2D and 3D OpenGL ES 2.0 vector g...
110
8.0
Customizable Display Controller with composition support
CDC is a fully Customizable Display Controller IP supporting up to 16k (4096x4096 pixel) resolutions on a MIPI-DPI compliant parallel video output. Se...
111
6.0
Warping Engine IP block for image transformation, HUDs and fish-eye correction
TES Warping Engine is a specialized IP core for arbitrary high-performance re-mapping of bitmaps from memory-to-memory or memory-to-stream. Applicatio...
112
6.0
DPI video output to system memory capture IP block
The Virtual Display IP is designed to enable automated testing of the output of display controllers with DPI-2 output interface such as the TES CDC (C...
113
5.0556
TSMC 28nm Wirebond and FlipChip compatible <80fF ESD Solutions for Multi-Gigabit SerDes Applications.
This silicon-proven TSMC 28nm Digital I/O Library delivers a low-capacitance, high-reliability interface solution optimized for advanced semiconductor...
114
4.0556
High-voltage solutions in baseline TSMC and GlobalFoundries technology
Certus is pleased to offer High-voltage ESD solutions across multiple baseline technologies. Distinguishing Certus is our ability to provide high-vol...
115
4.0556
IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
Certus Semiconductor has a long history of working across a broad range of technology nodes from 180nm down to the latest FinFet offerings. Our I/O s...
116
4.0
CAN Flexible Data-Rate Controller
The Controller Area Network (CAN) is a highly reliable serial bus protocol defined in the Bosch CAN specifications for standard CAN 2.0B and CAN FD, a...
117
4.0
Fast Fourier Transformation
Fast Fourier Transformation (FFT) calculation IP block....
118
4.0
ECDSA IP
The ECDSA IP is specifically designed for elliptic curve cryptography (ECC) using the ANSI X9.63 secp256k1 Koblitz curve. This cutting-edge ECDSA I...
119
4.0
3D GPU / OpenGL ES 1.1 GPU - D/AVE 3D
D/AVE 3D is cost-efficient IP core for 3D graphics applications. This core is available for FPGAs, ASICs and SOCs, specifically designed for the embed...
120
4.0
Licensable baseband controller core + Licensable upper and lower protocol stacks
...
121
4.0
PKCS IP
The PKCS IP is specifically designed for RSA Laboratories' Public-Key Cryptography Standards (PKCS) series, specifically PKCS #5 v2.0. Also used for E...
122
4.0
TS-4x8 V-Band Array Antenna 4x8 Array Antenna, 57 – 67 GHz V-Connector 1.85 mm
The TS-4x8 V-Band Array Antenna is a 57 to 67 GHz planar antenna with a bore-sight gain of min. 14 dBi (18 dBi without feed losses) measured at V-conn...
123
3.0
8 Channel Stand-alone CAN controller
The TEECAN8 is an IC targeted to industry applications using CAN....
124
3.0
60 GHz Power Amplifier
The 60 GHz PA is a power amplifier designed for applications in the 57 – 64 GHz frequency range. This product is well suited for wireless LAN and poi...
125
3.0
60GHz Low Noise Amplifier
The 60 GHz LNA is a low noise amplifier designed for applications in the 57 – 64 GHz frequency range. This product is well suited for wireless LAN an...
126
3.0
12 Bit Low Power AD Converter
The IP is a 12bit fully differential successive approximation analog-to-digital converter. With a clock frequency of 5MHz a sampling rate of 200kS/s i...
127
3.0
14 Bit Sigma Delta AD Converter
Full-Scale Differential input from -320mV to +320mV Independent Conversion Output Rate 17.6kHz Active and Standby Quiescent current modes Programmable...
128
3.0
16 Bit Sigma Delta AD Converter
This macro-cell is a single-channel 16-bit oversampling ADC intended for digital audio bandwidth applications. Supplied with 1.2V, the analog and the ...
129
3.0
CAN Controller
The final ASIC (Phase 2) will be a compound system solution comprising of a power supply blocks 3.3V, 5V Regulator and the CAN ISO11898-5 physical la...
130
3.0
CAN Transceiver
The HSCAN IP is a high speed CAN Transceiver for automotive 12V applications. It is fully compliant to the ISO 11898-5 Specifications. Sleep mode and ...
131
3.0
Advanced Encryption Standard (AES) core
The AES / Rijndael core can handle input block sizes of 128, 192 or 256 bit. The Decoder needs the key and the cipher text as input. The start_de sign...
132
3.0
AHB2APB Bridge IP
Truechip's AHB2APB Bridge IP provides chip designers and architects, an efficient way to connect Different Bus Protocol based IPs with reduced latency...
133
3.0
3V3 CAN Transceiver
The TS_CAN_3V3_X8 is a 3.3V CAN transceiver which supports data rates up to 1Mbps and is compatible with ISO 11898-2 compliant CAN transceivers. It su...
134
2.5
I2C Master
The MI2CM macro implements a synchronous single-chip I2C Master only Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus is ca...
135
2.5
I2C MAster Slave
The MI2CMS macro implements a synchronous single-chip I2C Master and Slave Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus...
136
2.5
I2C Slave
The MI2CS macro implements a synchronous single-chip I2C Slave Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus is carried ...
137
2.5
FAT32 IP Soft Core for NVMe
FAT32 IP Soft Core for NVMe...
138
2.5
SATA 2 HOST ON CYCLONE 5 GX
The LDS SATA 2 HOST_C5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a ALTERA Cyclone V GX FPGA. The...
139
2.5
SATA 3 Host Controller on ARRIA V FPGA
The LDS SATA 3 HOST AR5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Stratix IV GX FPGA. T...
140
2.5
SATA 3 Host Controller on Xilinx Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS_SATA3_HO...
141
2.5
SATA 3 Host Controller on ZYNQ
The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS SATA 3 HOST...
142
2.5
SATA 3 HOST IP on ARRIA 10 FPGA
The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The L...
143
2.5
SATA Device Controller on Altera Arria II GX
The LDS SATA DEVICE AR2GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA ARRIA II GX FPGA. The...
144
2.5
SATA Device Controller on Kintex 7
The LDS SATA 3 DEVICE XK7 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 FPGA. The LDS SATA...
145
2.5
SATA Device on Stratix IV GX
The LDS SATA DEVICE STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA STRATIX IV GX FPGA. ...
146
2.5
SATA Device on Virtex 6
The LDS SATA DEVICE XV6 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 FPGA. The LDS SATA D...
147
2.5
SATA HOST 3 ON KINTEX 7 Ultrascale
The LDS SATA 3 HOST XK7U IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 Ultrascale speed grade 2 FPGA. The...
148
2.5
SATA HOST 3 ON VIRTEX 7 GTH
...
149
2.5
SATA Host 6G Controller on Kintex 7
The LDS SATA 3 HOST XK7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 speed grade 2 FPGA. The LDS SATA 3 ...
150
2.5
SATA Host Controller
The LDS SATA HOST STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Startix IV GX FPGA. Th...