1 200.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

2 150.0

Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...

3 150.0

Synopsys 1.6T Ethernet MAC IP The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...

4 100.0

1.6T Ethernet PCS IP The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

5 100.0

1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

6 100.0

1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...

7 100.0

200G and 400G Ethernet PCS IP The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...

8 100.0

800G Ethernet PCS IP The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...

9 100.0

10G-100G MACsec Security Module for Ethernet The Synopsys 100G/200G/400G/800G Ethernet MAC IP implements the full MAC layer and reconciliation sublayer compliant with the IEEE 802.3 specification...

10 100.0

10G-100G MACsec Security Module for Ethernet Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...

11 100.0

112G Ethernet PHY in TSMC (N7, N6, N5, N3P) The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

12 100.0

224G Ethernet PHY in TSMC (N3E, N2P) The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

13 100.0

PCIe 5.0 Integrity and Data Encryption Security Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

14 100.0

PCIe 6.0 Integrity and Data Encryption Security Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

15 100.0

PCIe 6.0 PHY in Samsung (SF5A, SF4X, SF2) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

16 100.0

PCIe 6.0 PHY in TSMC (N6, N5, N4P, N4C, N3P, N3E) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

17 100.0

PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N2P) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

18 100.0

PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

19 100.0

UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

20 100.0

UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

21 100.0

UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

22 100.0

HDCP 2.3 Embedded Security Modules on DisplayPort/USB Type-C The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...

23 100.0

1G-25G MACsec Security Module Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...

24 100.0

The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...

25 100.0

High-Density MRAM Compiler TSMC 22ULL The Synopsys Foundation IP optimized for the TSMC’s 22nm Ultra Low Leakage (ULL) process provides designers an extensive offering of high-speed, high...

26 100.0

RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enh...

27 100.0

Embedded Security Modules for HDCP 2.3 on HDMI IP The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...

28 100.0

Universal Chiplet Interconnect Express (UCIe) Controller Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...

29 100.0

Inline Memory Encryption (IME) Security Module for DDR/LPDDR As our connected world expands, the technological advances in high-performance computing (HPC) are reshaping system-on-chip (SoC) designs to address t...

30 100.0

ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performanc...

31 100.0

ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core) The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performanc...

32 100.0

ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enha...

33 100.0

ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. ...

34 100.0

USB4 Controller & Router IP The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

35 100.0

USB4 PHY in Samsung (SF4X) The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

36 100.0

USB4 PHY in TSMC (N7, N6, N5, N4P, N3E, N3P) The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

37 100.0

Multiport/Multiprotocol HDCP 2.3 Embedded Security Modules The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...

38 100.0

CXL 2.0 Integrity and Data Encryption Security Module The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators...

39 70.0

40G UCIe PHY IP on Samsung SF4X Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

40 50.0

40G UCIe PHY for high-density advanced packages Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

41 50.0

40G UCIe PHY for organic substrate standard packages Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

42 50.0

32G PHY in TSMC (16nm, 12nm, N7, N6, N5, N5A, N4C, N3E, N3P) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

43 50.0

56G Ethernet PHY in TSMC (16nm, 12nm) The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

44 50.0

HBM3 PHY V2 in TSMC (N5, N4P, N3E) The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...

45 50.0

PCIe 4.0 PHY in TSMC (28nm, 16nm, 12nm, N7, N3P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

46 50.0

PCIe 5.0 PHY in TSMC (16nm, 12nm, N7, N6, N5, N4P, N4C, N3E, N3P) The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...

47 50.0

HDMI 2.1 Tx PHY in TSMC (16nm, 12nm, N7, N6, N4, N3E) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

48 50.0

HDMI 2.1/DisplayPort 2.1 TX PHY in TSMC (N3E, N3P) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

49 50.0

DDR5 PHY in TSMC (N5, N4P, N3P, N3E) The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

50 50.0

MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes in TSMC (12nm, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...