Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3735 IP
3701
0.0
JTAG 2-Wire to 4-Wire Adapter
The OT4001_cjtag is an adapter which permits legacy IEEE 1149.1 ports to communicate as an IEEE 1149.7 2-wire OScan1 cJTAG port. A simple update to a ...
3702
0.0
StarFive -RISC-V design services and training
Founded in 2018, StarFive is a Chinese local high-tech company with independent intellectual properties. As the leader of the RISC-V software and hard...
3703
0.0
LTE UE PHY layer
The PHY baseband covers all Synchronization Signals, downlink and uplink Physical Channels, libraries, algorithms integrated with cross-functional log...
3704
0.0
LTE UE Protocol Stack HW (Arm, Cortex A8)
Mymo offers 3GPP LTE Release-9 UE FDD and TDD UE Protocol Stack on Arm hardware . The Integrated solution of MAC-RLC-PDCP-RRC-NAS-TCP-IP with several ...
3705
0.0
LTE UE Protocol Stack Software
Mymo offers 3GPP LTE Release-9 UE FDD and TDD UE Protocol Stack software. The software is in ANSI C ported at RT-Linux kernel level ideally suited for...
3706
0.0
Dual Port High-Current SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Dual Port High-Current SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
3707
0.0
Successive Approximation ADC_2M10b
Innosilicon SARADC IP is a small-sized, low power analog to digital converter with input channels. The converter is a charge-redistribution successive...
3708
0.0
Successive Approximation ADC_2M12b
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
3709
0.0
Successive Approximation ADC_3M10b
Innosilicon SARADC IP is a small-sized, low power analog to digital converter with input channel and Standard I/O multiplexed. The converter is a char...
3710
0.0
Nuclei N100: Very tiny area 2-stage-pipeline processor for embedded applications
Entry-level 32-bit RISC-V core, one of the world's smallest RISC-V cores. Optimized for ultra-low power consumption and minimal area, targeting cost-s...
3711
0.0
Nuclei N200: Ultra-low-power 2-stage-pipeline processor for embedded applications
Mid-range 32-bit RISC-V core, the world's first general-purpose MCU based on RISC-V. Balancing power, performance and area, comparable to ARM Cortex-M...
3712
0.0
Nuclei N300: Low-power 3-stage-pipeline processor with DSP/FPU capable for embedded applications
High-performance 32-bit RISC-V core, Nuclei's most widely adopted, feature-rich embedded core. Suitable for complex real-time embedded applications, w...
3713
0.0
Nuclei N600(SMP): 32-bit high-efficiency 6-stage-pipeline processor with DSP/FPU capable for embedded and real-time applications
32-bit high-efficiency multi-core processor without MMU, comparable to ARM Cortex-R4/R5, based on the Nuclei 600 Series architecture, supporting 2–4 c...
3714
0.0
Nuclei NI1000: AI-optimized high-performance processor with advanced vector extension (up to 4096-bit) for high-end AI and HPC applications
64-bit high-end high-throughput RISC-V core, belonging to Nuclei 1000 series with out-of-order execution architecture. It adopts 2-wide decode design,...
3715
0.0
Nuclei NI900: AI-optimized high-performance processor with advanced vector extension (up to 1024-bit) for AI applications
64/32-bit high-performance RISC-V core, supporting single-core and cluster SMP configurations. Equipped with powerful VPU, FPU and crypto accelerators...
3716
0.0
Nuclei NS100: 32-bit ultra-low-power 2-stage-pipeline secure processor for EAL 5+ secure embedded applications
32-bit ultra-low-power RISC-V core, designed for ultra-low-power MCU, IoT and other low-power applications. A competitive rival to ARM SC000, with mi...
3717
0.0
Nuclei NS300: 32-bit low-power 3-stage-pipeline secure processor for EAL 5+ secure embedded applications
32-bit security-enhanced low-power RISC-V core, evolved from Nuclei N300 with enhanced security features. A competitive rival to ARM SC300/M35P, combi...
3718
0.0
Nuclei U600(SMP): 32-bit high-efficiency 6-stage-pipeline processor (with MMU) for Linux-capable applications
32-bit high-efficiency RISC-V core with MMU, belonging to Nuclei 600 Series. Comparable to ARM Cortex-A5/A7, supporting 32-bit Linux system, balancing...
3719
0.0
Nuclei U900(SMP): 32-bit high-efficiency 9-stage-pipeline processor (with MMU) for Linux-capable applications
32-bit high-performance RISC-V core with MMU, belonging to Nuclei 900 Series. Comparable to ARM Cortex-A7/A9, supporting 32-bit Linux system, dual-iss...
3720
0.0
Nuclei UX600(SMP): 64-bit high-efficiency 6-stage-pipeline processor (with MMU) for Linux-capable applications
Entry-level 64-bit high-efficiency RISC-V core with MMU, belonging to Nuclei 600 Series. Comparable to ARM Cortex-A35/A53, supporting 64-bit Linux sys...
3721
0.0
Nuclei UX900(SMP): 64-bit high-efficiency 9-stage-pipeline processor (with MMU) for Linux-capable applications
64-bit high-performance RISC-V core with MMU, belonging to Nuclei 900 Series. Comparable to ARM Cortex-A35/A53/A55, dual-issue execution, supporting 6...
3722
0.0
Audio Codec
INNOSILICON™ Audio Codec IP is a low power, high resolution, stereo audio solution which leverages Sigma-Delta noise-shaping technology. The ADC, DAC,...
3723
0.0
PUF Security
A physical unclonable function, or PUF, is a "digital fingerprint" that serves as a unique identity for a semiconductor device such as a microprocesso...
3724
0.0
eUSB2 PHY
The industry’s most advanced process nodes do not support 3.3V signaling and 5V tolerance as required by the USB 2.0 specification. 3.3V signaling was...
3725
0.0
JVC_4K Adoptive Scaler + Super Resolution - Convert Full-HD to High quality 4k2k with super resolution technology
JVC s 4k2k Super Resolution IP is now available for licensing. It offers dramatically less jaggy and Full-HD to 4k2k up-conversion with high performan...
3726
0.0
LVDS RX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
3727
0.0
LVDS TX Combo TTL PHY
Innosilicon LVDS implements LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains four 7-bit parallel-load serial-out shift registers, a 7X clock...
3728
0.0
LVDS TX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
3729
0.0
LVDS/TTL PHY & Controller
INNOSILICON™ LVDS/TTL IP implements the LVDS TIA/EIA protocol, providing a low-voltage, high-speed point-to-point signal interface. It supports either...
3730
0.0
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/ Low-K process, Two Port Register File memory compiler....
3731
0.0
1x32 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um SiGe Bi...
3732
0.0
1x64 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm Mixed-Signal 1.8V/3.3V Process
The AT1X64T180MM0AB is organized as one by 64 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- Mixed-Signal ...
3733
0.0
Cyber Protection Technology for MIL-STD-1553, CAN Bus and ARINC825
Aircraft and car makers rely on inbound communication networks to reliably exchange real-time information between the dozens of ECUs and Avionic syste...
3734
0.0
Cycuity Radix Technology
Cycuity Radix Technology brings a more systematic and robust approach to hardware security verification. Explore and visualize how information flows t...
3735
0.0
Type-C PHY
Innosilicon Type-C IP is composed of the physical layer and the PHY logic. The physical layer contains 4 data channels, an AUX channel and bias circui...