51 30.0

USB 3.0 PHY IP, Silicon Proven in TSMC 12FFC For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The PHY complies with the requirements of UTMI, USB 2.0 PIPE, and USB 3.0 ...

52 25.0

12bit 4Gsps SAR General Purpose ADC IP Core High performance, 12-bit resolution, 4 Gsps sample rate Mixed-signal General Purpose ADC IP, nodes up to 8nm. Leading edge systems on chip (SoCs) for ...

53 25.0

12bit, 640Msps Dual channel IQ ADC IP Core Dual channel 12-bit, 640MS/s ADC is essentially a Dual channel 12-bit analog-to-digital converter (ADC) that can function at speeds of up to 640MS/s. ...

54 25.0

Generic Timer - Scalable I/O coprocessor for automotive microcontrollers The Generic Timer IP module (GTM) ensures accurate multi-input data acquisition and multi-output signal generation in automotive powertrain and active...

55 25.0

Software Defined Radio with Spread spectrum and SOQPSK for Telemetry applications This SDR supports Spread Spectrum and SOQPSK waveforms for Telemetry applications. Solution uses FPGA SoC based SDR design to offer flexibility for an...

56 20.0

H.264 Audio & Video Decoder IP The H.264 Decoder IP Core is a full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA development. The H.264 ...

57 20.0

H.265 Video Encoder/Decoder IP Core The H265 HEVC video encoder IP core is a single-chip solution designed to support H.265 video encoding across various resolutions, including QVGA, SD,...

58 20.0

LIN 2.2, 2.1 and 1.3 Protocol Controller IP The LIN is a soft core of the Local Interconnect Network (LIN). This interface is a serial communication protocol, designed primarily to be used in au...

59 20.0

MIPI CSI-2 Receiver v1.1 Controller IP, Compatible with MIPI C-PHY & D-PHY The CSI-2 Receiver IP is in charge of handling CSI2 & SMIA protocols, as well as depacking input data to pixels. It also selects the correct destinati...

60 20.0

Multi-LEO Satellite Link Emulator In the rapidly evolving landscape of satellite communications, the demand for robust and reliable links to Low Earth Orbit (LEO) satellites is on the ...

61 20.0

DVB-S2 LDPC Decoder IP In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Dens...

62 15.0

2.5G BaseT Ethernet PHY IP in TSMC 22ULL The 2.5G BaseT Ethernet PHY IP Core provides a robust, production-proven physical layer solution for SoCs requiring high-speed, low-power Ethernet con...

63 15.0

2.5G BaseT Ethernet PHY IP in TSMC 28HPC+ The 2.5G BaseT Ethernet PHY IP built on the 28nm process delivers a cost-effective and performance-optimized physical layer solution for a broad spect...

64 15.0

100M-1000M BaseT1 Ethernet PHY IP in TSMC 22ULL The 100M/1000M Base-T1 Ethernet PHY IP Core provides single-pair Ethernet connectivity with full IEEE 802.3bw and 802.3bp compliance, enabling reliabl...

65 15.0

100M/1000M Base-T1 Ethernet PHY IP in TSMC 28HPC+ The 100M/1000M Base-T1 Ethernet PHY IP Core delivers single-pair Ethernet connectivity with full IEEE compliance in a 28nm process node. Supporting bo...

66 15.0

IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core The PTP Ordinary Clock (OC) from NetTimeLogic is an extension to a single port of NetTimeLogic's PTP Transparent Clock (TC). It adds the Sync and Anno...

67 15.0

IEEE1588 & IEEE802.1AS PTP Transparent Clock (TC) core The PTP Transparent Clock (TC) from NetTimeLogic is a fully scalable implementation of a Peer-To-Peer, One-Step Transparent Clock according to IEEE158...

68 15.0

Network Redundancy (HSR & PRP) core The HSR&PRP Core from NetTimeLogic is a standalone Network Redundancy Core according to IEC62439-3 rev3. It allows to connect to a redundant network s...

69 15.0

Time Sensitive Networking (TSN) Single Port End Node core The TSN End Node IP core from NetTimeLogic is a standalone Time Sensitive Networking (TSN) single port end node core according to IEEE 802.1 and IEEE ...

70 15.0

Time Sensitive Networking (TSN) Switched End Node core The TSN Network Core (Switched End Node) from NetTimeLogic is a standalone Time Sensitive Networking (TSN) core according to IEEE 802.1, IEEE 1588 and...

71 15.0

ASA-ML Serdes IP Core in 22nm The ASA PHY IP Core in 22nm delivers next-generation automotive SerDes connectivity, enabling high-bandwidth, low-latency serial links for advanced au...

72 15.0

ASA-ML Serdes IP Core in 28nm The ASA PHY IP Core in 28nm provides scalable and robust SerDes connectivity for advanced automotive SoCs. Supporting the Automotive SerDes Alliance s...

73 12.0

GNSS High performance (GPS, Galileo, GLONASS, Beidou3, QZSS, IRNSS, SBAS) Digital IP This GNSS Multi-constellation Digital IP supports all the constellation GPS, Global Positioning Satellite (USA), GALILEO (Europe), GLONASS, Global Nav...

74 12.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of PIPE interface sp...

75 10.0

12 bit 5Msps SAR ADC IP core Engineered for performance and efficiency, this 12-bit SAR ADC IP Core delivers up to 5 mega samples per second while consuming minimal power, making ...

76 10.0

Narrow band - IoT Release-17 UE Protocol Stack (L2-L3) Software IP This NB-IoT Protocol Stack is 3GPP Release 17 compliant, Access Stratum and Non-Access Stratum (L2-L3 layers) which are further upgradable to future R...

77 10.0

Secure Hash Algorithm 256 IP Core A universal solution that effectively accelerates the SHA2-256 hash function conforming with FIPS PUB 180-4 is the SHA2-256 bridge to APB, AHB, and AX...

78 10.0

IEEE1588 & IEEE802.1AS PTP Hybrid Clock (HC) core The PTP Hybrid Clock (HC) from NetTimeLogic is a combination of NetTimeLogic's PTP Transparent Clock (TC) and PTP Ordinary Clock (OC). It adds the Syn...

79 10.0

IEEE1588 & IEEE802.1AS PTP Timestamp Unit (TSU) core NetTimeLogic’s PTP Timestamp Unit is an implementation of a single port Frame Timestamp Unit (TSU) according to IEEE1588-2008 (PTP). It detects PTP fr...

80 10.0

5G Ultra low power Sub-6 GHz RF Transceiver IP This is a 3GPP compliant 5G Sub-6GHz RF Transceiver IP optimized for cellular application. It integrates all the necessary RF/analog/mixed signal func...

81 10.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 7 FF Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...

82 10.0

MIPI DSI-2 Transmitter v1.1 Controller IP, Compatible with MIPI D-PHY & C-PHY MIPI is the Mobile Industry Processor Interface that provides specification for software and hardware interfaces in mobile terminals and thereby encou...

83 10.0

GNSS Ultra low power (GPS, Galileo, GLONASS, Beidou3, QZSS, IRNSS, SBAS) Digital IP This Ultra Low Power GNSS Multi-Constellation Digital IP is extracted from a production chipset supporting all the major constellations including GPS,...

84 10.0

Low Power 12bit 640Msps silicon proven High performance Current Steering DAC IP Core 12-bit, 640Msps Current Steering DAC is a high-performance current steering DAC supporting data rates up to 640Msps. Each DAC core comprises a current...

85 10.0

USB 3.0 PHY IP, Silicon Proven in TSMC 22ULP The USB 3.0 PHY IP Core is a transceiver provided for supplementary devices, compliant with UTMI (USB SuperSpeed), USB 3.0, and USB 2.0 PIPE requireme...

86 10.0

NTN eNodeB System Test Bench The NB-IoT NTN System Test Bench (STB) is a cost-effective, flexible testing environment for NB-IoT NTN eNodeB product developers. Simulating either t...

87 10.0

NTP Server core NetTimeLogic’s NTP Server is a full hardware (FPGA) only implementation of a SNTPv4 Server according to RFC 4330/5905. It supports hardware timestampi...

88 10.0

Automotive Ethernet (100BaseT1) Whitebox PHY IP with BroadR Reach The Automotive Ethernet PHY IP Core is a 100M Ethernet PHY IP. Boasting a BroadR-Reach™ feature compatible with 100BaseT1 operations. It is a highly i...

89 9.0

Ultra-low jitter, low-power ring-oscillator-based PLL - 6GHz-12.5GHz InCirT’s APLL12GGF22 is the ring-oscillator based analogue-PLL which provides ultra-low jitter (600fs rms jitter at 12.5GHz) and low-power consumption...

90 9.0

Ultra-low jitter, low-power ring-oscillator-based PLL-3GHz-4GHz InCirT’s APLL4GGF22 is the ring-oscillator based analogue-PLL which provides ultra-low jitter (400fs rms jitter at 4GHz) and low-power consumption (3m...

91 9.0

Ultra-low Power, compact 5 Bits R/2R Bias DAC The ICBIASDAC101_GF22FDX is a compact R2R DAC. The DAC has the full dynamic-range from 0 to VDD. ICBIASDAC101_GF22FDX consumes only 16uW....

92 9.0

Compact, low-power, 8bit ADC The ICADCSAR101_GF22FDX from InCirT GmbH is a compact, and ultralow-power 8bit ADC designed in GF 22nm FDSOI. The ADC can have sampling speeds up to 1...

93 8.0

11-bit, 1GSPS, ultra-low power IQ-DAC in 22nm IQDAC1GGF22FDX is an ultra-low power current-steering 11-bit IQDAC which can operate up to 1GSPS designed in GF 22nm FDX. It consists of two DACs (I a...

94 8.0

11-bit, 500MSPS, ultra-low power IQ-DAC in 22nm IQDAC500GF22FDX is an ultra-low power current-steering 11-bit IQDAC which can operate up to 500MSPS designed in GF 22nm FDX. It consists of two DACs (...

95 8.0

11-bit, up-to 2GHz iBW, ultra-low power DAC in GF 22nm Tx2GGF22 is the flagship product of InCirT exploiting completely a new architecture which leads to ultra-low power consumption (0.4W) while maintainin...

96 8.0

Capacitor-less Low Dropout regulator (LDO) 30 mA output The ICPMLDO101_GF22FDX is capacitor-less linear voltage regulator in GF 22nmFDX. The LDO operates for a single input voltage in the range 1.4V to 1.9V...

97 8.0

Bi-directional High speed interface lane up to 12.5Gbps InCirT offers SerDes which can deliver up to 12.5Gbps per lane for bidirectional data transfer. It consists of programmable receiver front-end and tra...

98 8.0

Ultra-low jitter, low-power ring-oscillator-based PLL - 4.5GHz-9.5GHz InCirT’s APLL9GGF22 is the ring-oscillator based analogue-PLL which provides ultra-low jitter (690fs rms jitter at 9.5GHz) and low-power consumption (...

99 8.0

Ultra-low jitter, low-power ring-oscillator-based PLL-4GHz-5GHz InCirT’s APLL5GGF22 is the ring-oscillator based analogue-PLL which provides ultra-low jitter (400fs rms jitter at 5GHz) and low-power consumption (3....

100 8.0

Ultra-low jitter, type-I ADDLL with adaptive dither cancellation-3GHz-5GHz InCirT’s Type-I ADDLL5GGF22 is an all-digital delay-locked loop (ADDLL) featuring an adaptive dithering cancellation technique. This innovation ensure...