Design & Reuse
Catalog of SIP Cores
System on Chip design resources
123 IP
51
2.0
ADS-B 1090 MHz (ES) Receiver
ADS-B (ES) receiver offers a simple solution for the reception of ADS-B Flight and Traffic information. Compatible with all FPGA and ASIC devices, the...
52
2.0
Very-low-noise and programmable very-high-gain DC-voltage amplifier with precision offset trimming
The TS_VA_LNDC_X8 comprises the main function dcamp and its companion dcamptrim. The dcamp is a very-low-output-noise-level (604μVRMS max) and 1%-prec...
53
2.0
RF Power Amplifier Precorrection System
Digital Precorrection (Predistortion) system used to compensate for the non-linearity of an RF power amplifier. Compensates for both Gain and Phase. T...
54
2.0
Chroma Re-sampler
Converts pixels in the YCbCr colour-space from 30-bit 4:4:4 format to 20-bit 4:2:2 and vice-versa. Features a fully pipelined design with simple flow...
55
2.0
Video Interlacer
Easy to use video interlacer IP Core converts all digital progressive video formats to interlaced equivalents. The design is fully programmable, allo...
56
2.0
High-Speed LVDS (SERDES) Transceiver
High-speed LVDS (SERDES) transceiver with up to 8 serial data lanes, generic data width and integrated asynchronous FIFO. Ideal for standard LVDS link...
57
2.0
Silicon solutions & Protocols and Software applications for Ultra Wideband Technologies
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58
2.0
Binary-FSK Demodulator
16-bit BFSK demodulator with complex or real data samples. Suitable for passband or baseband operation. Ideal for use in low cost / low power RF ap...
59
2.0
Binary-PSK Demodulator
16-bit BPSK demodulator ideal for low-cost radio links over a few 100m. Features automatic carrier lock with no complex PLL setup or tuning required. ...
60
2.0
Pipelined Divider
Function y = a / b is a very high-speed divider with configurable dividend and divisor width. Inputs and outputs may be specified as either signed or...
61
2.0
Pipelined Multiplier
Function y = a * b is a high-speed multiplier with configurable width and depth. Inputs and outputs may be specified as either signed or unsigned val...
62
2.0
Pipelined Square Root
Function y = √x is a fully scalable square-root function with configurable data width. Inputs and outputs are unsigned integers. An n-bit input valu...
63
2.0
IIR Filter Second-Order-Section
2nd order IIR filter sometimes referred to as a 'bi-quad'. Internally, it has a fully pipelined architecture permitting the highest possible sample ra...
64
2.0
Direct Digital Synthesizer
High-precision Direct Digital Synthesizer (NCO) used in digital up/down conversion, mixing, and the generation of periodic waveforms. Simultaneous SIN...
65
2.0
Fixed-point to Floating-point Converter
Converts fixed-point numbers to 32-bit floating-point representation. The fixed-point input has a configurable word and fraction width. Floating-point...
66
2.0
Floating-point Adder
High-speed fully pipelined 32-bit floating-point adder/subtracter based on the IEEE 754 standard. Results have a latency of 5 clock cycles. Ideal f...
67
2.0
Floating-point Divider
High-speed fully pipelined 32-bit floating-point divider based on the IEEE 754 standard. Features a generic latency from 2 to 49 clock cycles. Ideal ...
68
2.0
Floating-point Multiplier
High-speed fully pipelined 32-bit floating-point multiplier based on the IEEE 754 standard. Results have a latency of only 4 clock cycles. Ideal for ...
69
2.0
Floating-point Square-root
High-speed fully pipelined 32-bit floating-point square-root function based on the IEEE 754 standard. Features a generic latency from 2 to 24 clock cy...
70
2.0
Floating-point to Fixed-point Converter
Converts 32-bit floating-point numbers to fixed-point representation. The fixed-point output has a configurable word and fraction width. Floating-poin...
71
2.0
Clock Buffer
The TS_CLKBUF_25pF_X8 is a clock buffer which transfers the input clock signal to other digital or mixed-signal chips, which feature altogether a maxi...
72
2.0
Ultra-speed FIR Filter
FIR filter designed for very high sample rate applications. Organized as a systolic array, the filter is modular and scalable, permitting the user to...
73
2.0
8MHz / 40MHz Pierce Oscillator
The TS_XOSC_40M_X8 is a 8MHz / 40MHz Pierce oscillator that generates a VCC-level logic square wave when a 8MHz / 40MHz quartz crystal is connected be...
74
2.0
SMPTE Decoder with Colour-Space Converter
Converts a high-definition SMPTE standard format stream to 24-bit RGB digital video. Generates pixels, syncs, flags and data valid for input to your ...
75
2.0
SMPTE Encoder with Colour-Space Converter
Encodes a 24-bit RGB digital video signal into a standard SMPTE format stream. Includes an integrated RGB to YCbCr colour-space converter. Ideal for ...
76
2.0
SMPTE Test Pattern Generator
Versatile test pattern generator capable of producing a range of test patterns in various high-definition SMPTE formats such as 296M and 274M. The mod...
77
2.0
Integer-N-PLL-based HF Frequency Synthesizer and Clock Generator with integrated Loop Filter and VCO
The TS_FS_9M70_X8 synthesizes 3.3V-square-wave FVCO frequencies within the HF range from 2.424MHz up to 9.697MHz, by steps of 18.9393kHz, and provides...
78
2.0
Colour-Space Converter
Converts 24-bit RGB to 30-bit YCbCr in 4:4:4 format and vice-versa. Features a fully pipelined design with simple flow-control and 1 x pixel/clock o...
79
2.0
Complex Digital Down Converter
High-precision 16-bit complex digital down-converter / IQ demodulator with a fully configurable decimation filter stage. Ideal for the conversion of I...
80
2.0
Cosine Function
Function y = cos(x) calculates the cosine of an angle in radians. It has a high-speed, fully pipelined architecture and uses a polynomial with dynamic...
81
2.0
Motion-adaptive Video Deinterlacer
Studio-quality video deinterlacer. Converts all interlaced digital video formats to high-res progressive versions. Choice of three deinterlacing mode...
82
2.0
Graphics Processor Overlay IP Core
The GPU_OVERLAY IP Core (Figure 1) is a highly versatile on-screen display processor that allows high-quality anti-aliased bitmap graphics and text to...
83
2.0
Arctan Function
Function y = atan(x) calculates the inverse tangent of a fraction. It has a high-speed, fully pipelined architecture and uses a polynomial with dynam...
84
2.0
BT656 Decoder with Colour-Space Converter
Converts a standard ITU-R BT.656 format stream to 24-bit RGB digital video. Generates pixels, syncs, flags and data valid for input to your video pipe...
85
2.0
BT656 Encoder with Colour-Space Converter
Encodes a 24-bit RGB digital video signal into a standard ITU-R BT.656 format stream. Includes an integrated RGB to YCbCr colour-space converter. Idea...
86
2.0
BT656 Test Pattern Generator
Versatile test pattern generator capable of producing a range of test patterns in standard ITU-R BT.656 format. The module is ideal for use in the pr...
87
2.0
Quadruple Capacitor Switch
The TS_SW_4Cap_X8 is a quadruple capacitor switch that can be used for resonator/transducer trimming. TES can transfer this IP to other technologies u...
88
2.0
Multi-format Video Deinterlacer
High-performance video deinterlacer. Converts all interlaced digital video formats such as 480i, 576i and HD1080i to high-res progressive versions. Ge...
89
2.0
Symmetrical FIR Filter
FIR filter designed for high sample rate applications with symmetrical coefficients and an even or odd number of taps. Features configurable coefficie...
90
1.0
Packet-based Digital Radio Link
Fully custom Digital Radio Link based on either our FSK or PSK modulation schemes. Data is split into packets or frames and modulated for transmissio...
91
1.0
UART Serial Interface Controller
UART compatible Serial Interface Controller with Receive and Transmit FIFOs and support for bit rates from 9600 to 921600 baud. UART is used extens...
92
1.0
ADS-B 978 MHz (UAT) Receiver
ADS-B (UAT) receiver offers a comprehensive solution for the reception of ADS-B Flight, Traffic and Weather information. Compatible with all FPGA and ...
93
1.0
Text Overlay Module
Module permits text in a user-defined text-box to be inserted directly over 24-bit RGB video. Simply write the ASCII characters to be displayed to an ...
94
1.0
Video Frame Buffer
Video Frame buffer permits an asynchronous video source to be buffered in an external memory. Features a generic memory interface suitable for all mem...
95
1.0
Video Test Pattern Generator
Pattern generator for video testing and prototyping. Wide range of test patterns in colour, greyscale and monochrome. Test patterns are configurabl...
96
1.0
Video Timing Generator
Signal timing generator for high-resolution video and graphics applications. Module accepts RGB pixels and generates syncs, enable and blanking inform...
97
1.0
Digital Video Scaler
Digital Video up/down scaler accepts RGB/YCbCr video and permits independent horizontal and vertical scaling of the input to generate any desired reso...
98
1.0
SinCos Function
Function calculates the Sine and Cosine of input x in radians. Inputs are 18-bit signed values in the range -Pi to Pi. Output values are 17-bit sign...
99
1.0
Sine Function
Function y = sin(x) calculates the sine of an angle in radians. It has a high-speed, fully pipelined architecture and uses a polynomial with dynamic c...
100
1.0
Sony Camera LVDS Interface
The SONY_CAM_IF IP Core provides a simple way to connect the Sony® FCB-EV range of cameras to your FPGA. It serves as a direct replacement for an exte...