Design & Reuse
368 IP
351
0.0
Successive Approximation ADC_2M12b
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
352
0.0
Successive Approximation ADC_3M10b
Innosilicon SARADC IP is a small-sized, low power analog to digital converter with input channel and Standard I/O multiplexed. The converter is a char...
353
0.0
Audio Codec
INNOSILICON™ Audio Codec IP is a low power, high resolution, stereo audio solution which leverages Sigma-Delta noise-shaping technology. The ADC, DAC,...
354
0.0
PUF Security
A physical unclonable function, or PUF, is a "digital fingerprint" that serves as a unique identity for a semiconductor device such as a microprocesso...
355
0.0
Multi Constellation and Multi Frequency GNSS IP
Multi-constellation and Multi-frequency Correlators Soft GNSS IP for high sensitivity and high accuracy GNSS receivers Accord MGNSS IP (GNSS IP) is a...
356
0.0
Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm. The core decodes a bitstream produced by the OLH2...
357
0.0
SureCore - SureFIT, Application - Centric SRAM Design Services
sureCore Ltd is an IP company focused on the development of power efficient physical IP for next generation silicon processes at 28nm and below. To...
358
0.0
Curve25519 Key Exchange
The Curve25519 Key Exchange from Xiphera is a very compact Intellectual Property (IP) core designed for efficient key exchange using the X25519 protoc...
359
0.0
Curve25519 Key Exchange & Digital Signatures
The Curve25519 Key Exchange & Digital Signatures from Xiphera is a very compact Intellectual Property (IP) core designed for efficient X25519 key exch...
360
0.0
eUSB2 PHY
The industry’s most advanced process nodes do not support 3.3V signaling and 5V tolerance as required by the USB 2.0 specification. 3.3V signaling was...
361
0.0
LVDS RX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
362
0.0
LVDS TX Combo TTL PHY
Innosilicon LVDS implements LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains four 7-bit parallel-load serial-out shift registers, a 7X clock...
363
0.0
LVDS TX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
364
0.0
LVDS/TTL PHY & Controller
INNOSILICON™ LVDS/TTL IP implements the LVDS TIA/EIA protocol, providing a low-voltage, high-speed point-to-point signal interface. It supports either...
365
0.0
Over voltage detector
Over voltage detector...
366
0.0
PVT sensor in 28nm
PVTSENU28HPCP is an IP for process voltage and temperature sensing of the silicon chip die. It has unique features like voltage and temperature probes...
367
0.0
Expanded Serial Peripheral Interface (xSPI) Slave Controller
The MAXVY's JESD251 Expanded Serial Peripheral Interface Slave controller is provides high data throughput, low signal count, and limited backward com...
368
0.0
Type-C PHY
Innosilicon Type-C IP is composed of the physical layer and the PHY logic. The physical layer contains 4 data channels, an AUX channel and bias circui...