IP website as a catalyst of IP industry
(Dec. 5, 12:10-12:30)
By Gabrièle Saucier,
Design and Reuse
Gabriele Saucier got her PHD at the university of Grenoble where she was a professor and was heading a research lab on Integrated System Design .She conducted about 100 PHDs and published more than 350 papers in the Design and EDA field.
She is a IEEE fellow for her contributions in synthesis ,test generation an fault tolerance. Leaving her university career, she founded in the nineties a synthesis company IST (for innovative Synthesis Technologies) mainly dedicated to FPGA synthesis and in 97 Design and Reuse dedicated to IP Based design. She launched 2 successful conferences namely Euroasic and IP/SoC.