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Exhibition Program Committee Best IP Awards 2007
Panel: The future of IP industry. Are CPUs the only Stars in IP? (Dec. 5, 10:25-11:25)

Chairperson:
   

Richard Wallace
Editor-in-Chief
EE Times
Richard K. Wallace is vice president, editorial director of CMP Technology's Electronics group and is currently the editor-in-chief of EE Times Europe, an integrated print/online/digital edition whose development and launch, in Brussels, he led last year. Richard was editor-in-chief of EE Times, the leading newspaper in the global electronics industry, during its period of greatest readership, editorial and revenue growth in the late 1990s. He guided the launch of EE Times onto the internet in 1994 and directed the editorial development of the Electronics Group's media globalization strategy, playing a key role in the launch of the EE Times Asia and China editions in 1999, and EE Times Japan in 2005. As a thirty year veteran of technology news reporting, he has covered the business and technology evolution of the global electronics and semiconductor industry since the earliest days of the integrated circuit. As editor of EE Times he expanded the publication's global news gathering capabilities by assembling an international network of news and technology reporters and editors. He continues to report and write on key industry trends, with a special focus on the globalization, electronics design, and development and research. Today, eetimes.com is CMP's most heavily trafficked news website and the core of CMP's largest and fastest growing online business. Adweek Magazines Technology Marketing has consistently ranked Mr.Wallace among the most influential journalists in the business-to-business category and as one of the top Media Influencers in the high technology publishing market. Mr. Wallace is a Jesse N. Neal National Business Journalism award winner and under his direction EE Times has won numerous reporting and journalism honors. Richard received a B.A. in American literature from Columbia University in 1974, has done graduate-level study in journalism and Internet publishing at the Columbia University School of Journalism, New York University, the New York School of Visual Arts and Stanford University. He is currently a masters degree candidate at The New School Universitys Media Studies in New York City.


Panelists:
   

Jack Browne
MIPS
Mr. Browne joined MIPS Technologies in 2001 as director of market development, drawing on more than 25 years of industry experience in sales, marketing and engineering, primarily in Motorola's Semiconductor Products Sector. In 2002, he was appointed vice president of worldwide sales, and assumed the position of vice president of marketing in 2005. As the head of Motorola's 68000 marketing team, he helped establish the 68000 as a leading 32-bit embedded architecture in the 1980s and early 1990s, with revenues topping $500 million. In the 1990s, he was instrumental in gaining market share for PowerPC processors and growing overall revenue to $1.3 billion dollars through such roles as vice president of North American sales, vice president of the computer segment, and vice president of operations and vice president of marketing for Motorola's High Performance division. In 2000, he joined Wyle Electronics, which was subsequently acquired by Arrow Electronics, where he was responsible for growing their embedded processor, IP and design services businesses. An acknowledged industry spokesman, Mr. Browne has written more than 50 papers for industry publications and presented at more than 30 industry conferences. He holds a B.S.E.E. degree from the University of Texas.

   

Gagan Gupta
ARC
Gagan Gupta is Senior Director of Product Marketing at ARC International. Gagan is responsible for product planning and definition of ARC’s multimedia subsystems and configurable processors. Previously he was at Futurewei Technologies and LSI Logic where he has architected high performance processors. He has published papers and holds patents in the field of Computer Architecture. Gagan has a MS degree in Computer Science from Arizona State University.

   

Haydn Povey
ARM

   

Jeroen Leijten
Silicon Hive
Jeroen Leijten has over 13 years experience in the field of parallel computer architectures and reconfigurable computing. He holds a Ph.D. degree in reconfigurable multiprocessor architectures for real-time digital signal processing applications from the Eindhoven University of Technology, The Netherlands. At Philips Research he worked on digital VLSI, low power design, processor and compiler co-design, and multiprocessor architectures for high-end video post-processing. In 2002 he co-founded Silicon Hive, where he architected the processor architecture template and processor design methodology used to develop the HiveFlex range of C-programmable processors for communications, imaging, and video processing applications. Currently, he is Silicon Hive s CTO and leads the processor development team. Jeroen wrote numerous articles and holds 10 US patents in the area of programmable processors and related compiler technology.