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Panel: Addressing the challenges in Power Modelling at the ESL Level
Thursday, December 4, 2008, 9:30 AM - 10:30 AM | Room: Auditorium

While electronic system level (ESL) is being adopted in most leading electronic companies, there is still a need to explore and adopt new technologies and methodologies for early design development, such as power releated solutions. There is yet to be a standard for applying IP power modeling that fits with a TLM terminology and into the overall system modeling process. Although power is hardly analyzed today even at the RTL level, "access" to power at the ESL domain may become much more critical, given the impact designers can have on power behavior at this level. Ideally, software developers can also gain visibility into power dynamics and adjust their development flow to accommodate power guidelines, as well. With the current isolated HW and SW flows, this may seem unrealistic. What are some of the pitfalls of being "too early" in applying new technoloogies? This panel will explore critical issues and possible solutions for designing power applications, enabling engineering teams to rethink their approach to design planning using available ESL tools and methods.


Glenn Perry
G.M., ESL and HDL Design Creation
Mentor Graphics
Glenn Perry has served as the General Manager of the ESL-HDL Design Business Unit at Mentor Graphics since 2004. He joined Mentor in 1999 as the engineering director for system level simulation tools, bringing over 20 years of experience in the electronics industry, focused in the simulation and analysis of Systems and IC Design. Prior to Mentor, Perry held engineering and management positions at Analogy(now Synopsis), Harris Semiconductor, Sandia National Laboratories and the United States Air Force Weapons Laboratory. Perry studied electrical engineering in the USAF and University of New Mexico.


Jack Donovan
Jack Donovan is a co-founder of ESLX Incorporated, which recently merged with XtremeEDA Corporation. Jack has been focused on ESL Methodology, Training, and Implementation as a consultant since 2003. He was an active participant in the TLM 2.0 standardization effort. His company has provided consulting to a wide variety of market leading companies, ranging in size from startups to Fortune 500. Jack is also the co-author of “SystemC:From the Ground Up”, a popular book explaining the advanced usage of SystemC. He was previously a Director of Professional Services at Synopsys. Jack has over 20 years of system and ASIC design experience and has a BEE and MSEE from Georgia Tech.


Andrea Battistella
Virtual Platform Manager of Application Processor division
Graduated as Electronic Engineer from the "Politecnico di Torino" and the INPG-ENSERG Andrea has spent more than 10 years in the wireless communication and multimedia semiconductor industry, mostly in product development roles, where he has acquired a strong back-ground in digital SoC modeling. Searching always new techniques to increase product's time to market, he put in place several virtual simulation platforms at different levels of abstraction (Funct./TLM/BCA), to enable algorithms' behaviours evaluation, early SW development and best-in-class SoC Architecture specification, using available languages (now almost SystemC). In the last years he has strongly contributed in the standardization of the System Level Modeling process in ST Microelectronics. Since 2002 Andrea collaborates with different French Engineer High Schools as a temporary professor teaching System Level Modeling and SystemC.


Ian Phillips
ARM Fellow
Graduating from University of Swansea in Wales in 1975, Ian Phillips spent the next 23 years in various electronic companies and roles in the UK, before joining ARM in Cambridge in 1998. As Principle Staff Engineer he reports into the the Board and is responsible for making sure that emerging Science and Technology are aligned to Strategic Business needs; a role which takes him into the Research and Business community across Europe where he is quite well know. Complementary to this he supports various advisory and steering roles in UK and EU Government, as well as for University Research Programmes.