Design Reuse

Home Conference Program Exhibition Advisory Board Registration Practical Information D&R Seminar

Session: IP Design (1)
Wednesday, December 3, 2008, 1:00 PM - 2:30 PM | Room: 3

Moderated by:

Paolo Pezzati

  • "Practical Design and Implementation of a Configurable DDR2 PHY" by Lior Amarilio from ChipX Best IP Prize Candidate

  • "A generalized waveform synthesis mechanism for software radio" by Maurizio Colizza & Fabio Graziosi from Westaquila, Claudia Rinaldi from University of L'Aquila Best IP Prize Candidate

  • "DDR SDRAM Controller IP Designed for Reuse" by Alexsandro Bonatto, AndrĂ© Soares & Altamiro Susin from UFRGS Best IP Prize Candidate

  • "Stochastic Computation applied to the design of Error Correcting Decoders" by Gordon Harling from WideSail Technologies, Warren Gross & Shie Mannor from McGill University

  • "A multi-purpose Digital Controlled Potentiometer IP-Core for nano-scale Integration " by Reimund Wittmann, Ralf Kakerow & Harald Bothe from IP Gen Rechte GmbH, Werner Schardein from University of Applied Sciences and Arts, Dortmund Best IP Prize Candidate