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"IP BUSINESS MODEL" SESSION
"BEST IP PRIZE" SESSION
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"A Real-Time Video Smoothing IP Implementation using an FPGA-based Environment" by
Ridha DJEMAL from LEM (Tunisia), Didier DEMIGNY from ETIS (France) &
Rached TOURKI from LEM (Tunisia)
"IP SOC VERIFICATION" SESSION
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Design of SystemVerilog Assertion IP" by Eduard Cerny from Synopsys, Inc.
(USA), Janick Bergeron from Synopsys, Inc. (Canada) & Manoj Kumar Thottasseri
from Synopsys, Inc. (India)
"DESIGN PLATFORM" SESSION
"REUSE PRACTICE" SESSION
"ASIC DESIGN PLATFORM" SESSION
"VERIFICATION" SESSION
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System Verification Methodology (sVM) applied to Transaction Level
SystemC models" by Giles Hall from Verisity
"REUSE PRACTICE"
OPEN FORUM
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DesignJet: A Project Management Platform for Collaborative IC Design" by Charles Trappey
from National Chiao Tung University (Taiwan), Amy J.C. Trappey, Jiang Liang Hou &
Ker Jeng Chang from National Tsing Hua University (Taiwan) & Shiu Yuan Shih
from Avectec.com, Inc (Taiwan)
"DESIGN METHODOLOGY" SESSION
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Physical Design for Reuse: Strategies and Implementation" by Ralph Escherich
& Lane Albanese from ReShape Inc. (USA)
"INDUSTRIAL IP DESIGN PRACTICE" SESSION
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"Rapid Protocol Stack development Framework" by Vinaychandra A V S &
Girish Dandin from Wipro technologies (India)
"MULTI-PROCESSOR AND MULTI-THREAD SOC" SESSION
"VERIFICATION" OPEN FORUM
"DESIGN METHODOLOGIES"
OPEN FORUM
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