Design Reuse

EETimes

Welcome

IP BASED SOC DESIGN'2003 will be the 12th edition of the IFIP workshop organized in Grenoble (France) on hot topics in the design world, focusing for the past three years on IP based SoC design and qualification.

Working conference

Among 90 submissions the best technical contributions have been selected to bring together a high level working conference unique on hot topics such as "ASIC Platform","SystemC for IP Modeling" "Impact of Nanometer Technology", "IP/SoC Verification", etc...

Please click here to read the program

Keynote talks

Major players will deliver keynote talks on hot topics and you will be delighted to listen to :

  • Santanu Dutta, IC Design manager at Philips Semiconductors (USA) talking about "Recent Trends in Multi-Million-Gate SOC Designs"

  • Ted Vucurevich , CTO of Cadence (USA) discussing "Design platform for IP based SOC design"

  • Raul Camposano, CTO of Synopsys (USA) sharing his experiences in "The IP Provider Game: Size and Diversity Do Matter"

  • Jim Tully, Chief Analyst from Gartner / Dataquest (UK) presenting the studies on the "Dataquest IP business analysis"

Hot Panels

Hot Panels will be part of an attractive program and every participant will be invited to share his views with the audience. Are considered tentatively:

  • "Configurable Processors and Reconfigurable Logic: Flexible Architectures for SOCs" organized by Steve Leibson, Tensilica (USA) with the participation of IBM Research Lab (Switzerland), MIPS Technologuies (USA), DAFCA (Design Automation for Flexible Chip Architectures) (USA), Laboratoire LIRRM (France), Analyst and editors from Gilder Technology, MicroDesign Resource, Gartner Research (UK)

  • "IP qualification : the user camp versus the tool and IP vendor camp" organized by Philippe Magarshack, ST Microelectronics (France) with the participation of Alcatel (France), Philips (The Netherlands), ST Microelectronics (France) in the user camp and ARM (UK), Mentor Graphics (USA), Synopsys (USA), Verisity (USA) in the tool and IP provider camp

  • "Asic platform: the key for successful IP based SOC design Core based or interconnect based or technology structured ? " organized by Tim Daniels, LSI Logic (UK) & Joe Hanson, Altera (USA) with the participation of LSI Logic (UK), Altera (USA), Sonics (USA), the Spirit consortium (The Netherlands), etc...

  • "SystemC in Harmony, not in conflict with RTL" organized by G. Arnout, CoWare chairman and OSCI president with the participation of M. Burton from ARM, F. Ghenassia from STMicroelectronics, J. Aynsley from Doulos, etc...

  • "IP business models: A focus on IP quality and its impact" organized by P.Dworsky, Synopsys (USA) with the participation of ARM (UK), ST Microelectronics (France), Gartner / Dataquest (UK), etc..

IP/SOC 2003 best prizes

The contest for delivering the best IP/SOC design 2003 will be organised by Prof. Kunihiro Asada from the Tokyo university ;This year 4 candidates preselected by the LSI IP Design Award in Japan will be in competition with 4 addditional candidates for winning this prestigious trophee sponsored by ST Microelectronics

BEST IP/SOC DESIGN AWARD'2003 WILL BE DELIVERED
SPONSORED BY

Exhibition

In addition the "IP based SOC Design Workshop" has an exhibition attached, giving you the opportunity to see the reality of a SOC connected world. The joint exciting dedicated exhibition will allow you to meet the most advanced suppliers and take the chance to see the last products of the best vendors including Aptix, Artisan Components, Barco Silex, Coware, Design And Reuse, GeTeDes, Jennic Ltd., Mentor Graphics, Novas Software, OCPIP, Prosilog, Silicon and Software Systems , Soisic, SuperH, Synchronicity , Synopsys, Target Compiler, VCX Software Ltd., Verisity , Virage Logic and so on.

Seminar

A seminar takes place November 12th evening and has as objectives to report to the IP/SOC community and especially to D&R partners the role and achievement of D&R Entrance is free but registration is required

Important Dates

Deadline for submission of executive summary September 1, 2003
Notification of acceptance September 29, 2003
Final Version of the manuscript October 20, 2003
WORKSHOP November 13-14, 2003


IP Based SoC Design Archives

The foils of previous years' "IP Based SoC Design" events presentions are available online :


IP Based SoC Design 2002
IP Based SoC Design 2001
IP Based SoC Design 2000