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Seminar: Future in IP interconnects: optical, 3-D, wireless, what are the main challenges?
Tuesday December 1, 2009, 11:00 - 12:30 | Room: Mont Blanc

Chairperson:

   

Fabien CLERMIDY & Daniel VELLOU
CEA/LETI


Speakers:

   

Luca Benini
University of Bologna
“Scaling in the Third Dimension: Communication Architectures and Memory Hierarchies in an Integrated 3D World”

Biography:
Luca Benini is an Full Professor at the University of Bologna. He also holds a visiting faculty position at the Ecole Polytecnique Federale de Lausanne (EPFL). He received a Ph.D. degree in electrical engineering from Stanford University in 1997. Dr. Benini's research interests are in the design of systems for ambient intelligence, from multi-processor systems-on-chip/networks on chip to energy-efficient smart sensors and sensor networks. From there his research interest have spread into the field of biochips for the recognition of biological molecules, and into bioinformatics for the elaboration of the resulting information and further into more advanced algorithms for in silicon biology. He has published more than 300 papers in peer-reviewed international journals and conferences, three books, several book chapters and two patents. He has been program chair and vice-chair of Design Automation and Test in Europe Conference. He has been a Member of the 2003 MEDEA+ EDA roadmap committee 2003. He is a member of the IST Embedded System Technology Platform Initiative (ARTEMIS): working group on Design Methodologies, a Member of the Strategic Management Board of the ARTIST2 Network of excellence on Embedded System and a Member of the Advisory group on Computing Systems of the IST Embedded Systems Unit.
He has been member of the technical program committee and organizing committee of several technical conferences, including the Design Automation Conference, International Symposium on Low Power Design, the Symposium on Hardware-Software Codesign. He is Associate Editor of the IEEE Transactions on Computer-Aided Design of Circuits and Systems and of the ACM Journal on Emerging Technologies in Computing Systems. He is a Fellow of the IEEE.

   

Haykel Ben Jamaa
EPFL
“Connecting the scales using nanowire layers”

Biography:
Haykel Ben Jamaa is a post-doc researcher with the Laboratory of Integrated Systems at EPFL (Switzerland), where he obtained his PhD degree in Electrical Engineering in September 2005. He graduated from the “Technishe Universität München” (Germany) and from the “Ecole Centrale Paris” (France) in the field of Electrical Engineering. During his studies, Haykel Ben Jamaa had several industrial experiences and overseas activities (Design of modules for the DNA chips at Infineon Munich; Development of laser sensitive CNT FETs at Max-Planck-Institut Stuttgart...). He is Currently working on the design challenges for nanoelectronics with a focus on hybrid systems. His work covers manufacturing aspects of crossbar circuits as well as reliable system design and architecture in emerging technologies.

   

Laurent Fulbert
CEA-LETI
“Photonics-Electronics Integration on CMOS”

Biography:
Laurent Fulbert graduated from Ecole Centrale de Paris in 1989. From 1998 to 2004, he was manager of the Optoelectronics Devices laboratory, and is now in charge of the optoelectronics programmes. He managed or participated to several RTD projects at national and European level in FP5 and FP6. He is currently project coordinator of the FP7 project HELIOS