Design Reuse


Program Comittee
Conference Program


IP/SOC 2004 (IP Based SoC Design) will be the 13th edition of the Working conference on hot topics in the design world, focusing for the past 4 years on IP based SoC design and hold in the well known Silicon and Nanometer Technology Valley in the French Alps.

Working conference

Among 90 submissions the best technical contributions have been selected to bring together a high level working conference unique on hot topics such as "Design Platform", "IP/SoC Verification", "Industrial Reuse Practice", "Design Methodologies", "Multi-processor and multi-thread SoC", etc...

Please click here to read the program


Major players will deliver keynote talks on hot topics and you will be delighted to listen to :

  • Philippe Magarshack, Central R&D Group Vice-President, Design Automation, ST Microelectronics (France) talking about "IP Reuse in the era of sub -90 nm"

  • Rafi Nave, VP of Customer Services, Tower Semiconductor (Israel) discussing "Foundries Role in IP Business"

  • Ivo Bolsens, CTO and Vice President, Xilinx (USA) sharing his experiences in "IP based platform for programmable devices"

  • Harmel Sangha, Director of Coreware Marketing & Support LSI Logic (USA)
    talking about "Platform ASICs & Serial interconnects - Way of the future"
  • Jim Tully, Chief Analyst from Gartner / Dataquest (UK) presenting the studies on the "Dataquest IP business analysis"


Hot Panels will be part of an attractive program and every participant will be invited to share his views with the audience:

  • "Improving Performance and Efficiency in Embedded Designs Using Multi-threaded and Multi-Core Technologies" organized by Tom Petersen (MIPS Technologies) with the participation of Kai-Uwe Killiches (LSI Logic), Sam Fuller (AMCC), Tom Petersen (MIPS Technologies) and Brani Buric (Virage Logic)

  • "IP Business Models: Where is the value in IP?" Moderated by Jim Tully (Gartner Dataquest) with the participation of Jim Venable (Mentor Graphics), Phil Dworsky (Synopsys), Philippe Magarshack (STMicroelectronics), Bart de Loore (Philips) and John Goodenough (ARM)

  • "ESL Standards Who's doing what and how does it impact IP?" co-organized by CoWare, Inc. & Wolfgang Rosenstiel (Univ. of Tuebingen), moderated by Michael Santarini (EETimes) with the participation of Alain Clouard Chairman (OSCI), Ralph von Vignau (SPIRIT Consortium), Pete Hardee (CoWare, Inc.), James Colgan (Sonics, Inc.), Joachim Kunkel (Synopsys)

  • "The SPIRIT Initiative" organized by Pierre Bricaud (Synopsys) & Ralph von Vignau (Chairman, SPIRIT Consortium) with the participation of Ralph von Vignau (SPIRIT chair and Philips), Serge Hustin (STMicro), C. Lennard (SPIRIT vice chair and ARM), Joachim Kunkel (Synopsys), John Wilson (Mentor Graphics), Ian Mackintosh (VSIA-OCP) and Victor Berman (Cadence)

  • "What's the State of Verification IP ?" organized by Phil Dworsky (Synopsys) with the participation of Wolfgang Ecker (Infineon), Laurent Ducousso (STMicroelectronics), Synopsys, HDL Design

  • "Platform ASIC: How can Platform ASIC solutions best harness available IP?" organized by Tim Daniels (LSI Logic) moderated by Doug Amos (Synplicity, Director European Business Development) with the participation of Alon Kapel (eASIC, GM European Operations), Tim Daniels (LSI Logic, Technical Product Marketing Manager), Jean-Luc Couturier (MoreThanIP, Sales Manager, Western Europe), Arnaud Schleich (PLDA, VP Sales & Marketing) and Bob Beachler (Altera)

Hot Events

  • The SPIRIT Consortium which groups the major players in this field (ARM, Cadence, Mentor graphics, Philips, STMicroelectronics, Synopsys, ...) will present an initial release of specifications for standardizing IP packaging in a SoC design. A key press event will be hold on Wednesday December 8th at lunch time
  • IP/SOC 2004 Best prizes will be delivered under the sponsorship of ST Microelectronics both for the best design and design methodology in cooperation with the Japanese LSI Best Design initiative



In addition the "IP/SoC 2004 working confernce has an exhibition attached, giving you the opportunity to see the reality of a SOC connected world. The joint exciting dedicated exhibition will allow you to meet the most advanced suppliers and take the chance to see the last products of the best vendors including Altium Ltd., Ansoft, Artisan Components, Barco Silex, Beach Solutions, CoFluent Design, CoWare, Design And Reuse, FleXody, Ignios Ltd., IndigoVision Ltd., MatrixOne, Mentor Graphics, Microbridge Technology, MIPS Technologies, Novas Software, OCPIP, ProDesign Electronic & CAD Layout GmbH, Prosilog, SafeNet, Soisic, Summit Design, Synopsys, Temento Systems, Tera Systems, Tharas Systems, Verisity, Xilinx   and so on.

Book your space now.

Important Dates

Final Version of the manuscript November 13, 2004
WORKSHOP December 8-9, 2004

Around IP/SOC 2004

  • System Verification Workshop organized by The European Chip and Systems design Initiative (ECSI) (December 7, 2004 - Grenoble, France)

  • SPIRIT Training organized by the SPIRIT Consortium (December 7, 2004 - Grenoble, France)

  • IP Based SoC Design Archives

    The foils of previous years' "IP Based SoC Design" events presentations are available online :

    IP Based SoC Design 2003
    IP Based SoC Design 2002
    IP Based SoC Design 2001
    IP Based SoC Design 2000