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Moderated by:

• "Is there a “one-size fits all” SOC PLL?" by Jeff Galloway, Randy Caplan (Silicon Creations)
  
  
• "Systematic approach to verification of a mixed signal IP. HSIC PHY case study" by Dariusz Pieńkowski, Dariusz Kaczmarczyk, Tomasz Klimek (Evatronix SA), Harry Peterson (Mohagi), Wojciech Sakowski (Silesian University of Technology),
  
  
• "Distributed Video Coding (DVC): Challenges in Implementation and Practical Usage" by Kodavalla Vijay Kumar (Wipro Technologies), P.G. Krishna Mohan (JNTU College of Engineering, Hyderabad)
  
  
• "The Challenges and Benefits of Raising Analog/Mixed-Signal Verification Above the Transistor Level" by Andy Betts, Daniel Saias (Asygn)