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Session: Design Methodology (2)
Tuesday November 30, 2010, 15:30 - 17:00 | Room: Mont Blanc
Moderated by:
Pierre Bricaud Synopsys |
- "Automating Design Rule Waivers in SoC IP Reuse" by Sandeep Koranne, Anant Adke (Mentor Graphics Corporation)
- "An IP-XACT Deployment Case: IZARN IP" by Ates Berna (ST-Ericsson), Sparsh Arun (STMicroelectronics), Seyda Aygin, Sinan Topcu, Emrah Armagan (ST-Ericsson)
- "Integration-Optimized IP from Cadence" by Ranga Srinivasan, Brian Gardner (Cadence)
- "Optimizing System Management in the Platform SoC Era" by Howard Pakosh (ChipStart)
- "Design and Implementation of an OCP-IP Compliant 64-Node Butterfly Network on Multi-FPGA" by Khawla HAMWI (ENSTA ParisTech), Omar HAMMAMI (ENSTA ParisTech)