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IP-SOC 2010 Slides

Here are some of the slides from IP-SOC 2010. Thanks to all the participates for making it a great success!

Session: Invited Talks

• "Post- Silicon Debug: A New Approach for Solving the Unspoken and the Urgent" by Kathryn Kranen (Jasper Design Automation) (Slides + Audio)
• "Xilinx Plug-and-Play IP "Easy to Use IP Cores" by Rick Tomihiro (Xilinx)

Session: Design (1) 

• " Is there a “one-size fits all” SOC PLL?" by Jeff Galloway, Randy Caplan (Silicon Creations)
• " Systematic approach to verification of a mixed signal IP. HSIC PHY case study" by Dariusz Pienkowski, Dariusz Kaczmarczyk, Tomasz Klimek (Evatronix SA), Harry Peterson (Mohagi), Wojciech Sakowski (Silesian University of Technology)
• " Distributed Video Coding (DVC): Challenges in Implementation and Practical Usage" by Kodavalla Vijay Kumar (Wipro Technologies), P.G. Krishna Mohan (JNTU College of Engineering, Hyderabad)
• " The Challenges and Benefits of Raising Analog/Mixed-Signal Verification Above the Transistor Level" by Andy Betts, Daniel Saias (Asygn)

Session: Design (2)

• " Advanced Power Management in Embedded Memory Subsystems" by Lisa Minwell (Synopsys)
• " USB3.0 application building using low performance 8-bit microcontroller" by Michal Jedrak (EVATRONIX SA)
  
• " icyflex: an ultra low power DSP core for portable applications" by Marc Morgan, Simon Gray (CSEM)
  
• " SPVR: An IP core for Real-Time Speaker Verification" by Joseana Fechine, Lucas Paixão, Adalberto Júnior, Fabrício Melo, Sérgio Espinola (UFCG)
  
• " Distributed Video Coding: Adaptive Video Splitter" by Kodavalla Vijay Kumar (Wipro Technologies), P.G. Krishna Mohan (JNTU College of Engineering, Hyderabad)
  

Session: Design Methodology (1)

• " TLM 2.0 Standard into Action: Designing Efficient Processor Simulators" by Luca Fossati (European Space Agency)
• " Securing the integration of high-resolution ViCs on SoCs and SoCs on PCB " by Frederic Renoux (Dolphin Integration)

Session: Design Methodology (2)

• " Automating Design Rule Waivers in SoC IP Reuse" by Sandeep Koranne, Anant Adke (Mentor Graphics Corporation)
• " An IP-XACT Deployment Case: IZARN IP" by Ates Berna (ST-Ericsson), Sparsh Arun (STMicroelectronics), Seyda Aygin, Sinan Topcu, Emrah Armagan (ST-Ericsson)
• "Integration-Optimized IP from Cadence" by Ranga Srinivasan, Brian Gardner (Cadence)
• " Optimizing System Management in the Platform SoC Era" by Howard Pakosh (ChipStart)
• " Design and Implementation of an OCP-IP Compliant 64-Node Butterfly Network on Multi-FPGA" by Khawla HAMWI (ENSTA ParisTech), Omar HAMMAMI (ENSTA ParisTech)

Session: Verification / Validation

• " Static Formal Verification for System Level Verification" by Aniruddha Baljekar (NXP Semiconductors Pvt. Ltd.), Srinivas Puttur (NXP Semiconductors Pvt. Ltd.)
• " Improving Verification Efficiency Using Application Specific Instruction Processors" by Frank Schirrmeister, Achim Nohl, Drew Taussig (Synopsys)
• " Formal Methods to Verify the Power Manager for an Embedded Multiprocessor Cluster" by Kesava Talupuru (MIPS Technologies Inc.)
• " Guidelines for successful SoC Verification in OVM/UVM" by Moataz El Metwally (Mentor Graphics)

Session: Test & Debug

• " Configurable VESA- VGA and DVI Test Pattern Generator" by Nanjundaswamy HR (NeST Software private ltd, India), Divya B S (Acharya Institute of Technology, India )
• " Guidelines for SystemC – Debugger Integration" by Mohit Paul (NXP Semiconductors)
• " ATPG Tool Migration" by Pitchumani Guruswamy, Venkateshwaran Natarajan
• " SerDes in High Reliability, Long Reach Applications" by Claude Gauthier (MoSys)

Session: Exhibitor Track

• " VIRTUAL PROTOTYPING – Enabling the SW development Eco-System around new semiconductor platforms" by Pierre Bricaud (Synopsys)
• " Battling the On-chip Memory Bandwidth Bottleneck" by Jack Browne (Sonics)
• " FPGA-based High Performance Computing" by Mike Dini (DINI Group)

Session: Quality & Verification

• " Quality Maturity Server (QMS) - Case Study" by David Ling (Freescale Semiconductor Inc.)
• " Breaking the Language Barriers: Using Coverage Driven Verification to Improve the Quality of IP" by Pankaj Singh (Infineon Technologies), Gaurav Kumar Verma (Mentor Graphics)
• " Software Driven Verification" by Achim Nohl, Frank Schirrmeister (Synopsys)

Session: Embedded Systems

• " xLuna: a Real-Time, Dependable Kernel for Embedded Systems" by Giovanni Beltrame (Ecole Polytechnique de Montreal), Luca Fossati, Marco Zulianello (European Space Agency), Pedro Braga, Luis Henriques (Critical Software)
• " Embedded System realization with Multi-objective SOC Architecture for Vehicular Systems" by Sesha Giri Rao M (Department of Information Technology)
• " Engineering-SaaS CAD System for Embedded System Design, FlowrianII" by Ming MA (System Centroid Inc.), Hyung Kie YUN, Woo Kyung LEE, JungSeop SEO (Hoseo University), Inhag PARK (System Centroid Inc.)

Session: Multi processor &NoC

• " Prototyping Mesh-of-Tree NOC Based MPSOC on Mesh-of-Tree FPGA Devices" by Mazen Khaddour, Omar HAMMAMI (ENSTA)
• " MultiFPGA Design Based 64 PE with NoC Extension" by Abir M'zah, Omar Hammami (ENSTA)