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Handling external IP in FPGA-based Prototyping

Biography:

NGUYEN Huy-Nam is actually responsible for Formal Verification, High-Level Modelling and Hardware Prototyping at Atos. Previously, he held various R&D positions at Bull S.A.S. where he developed CAD solutions for ASIC design including Hardware Modelling, Functional Simulation , Logic Synthesis and Formal Verification. Huy-Nam graduated Engineer from l Ecole Nationale Supérieure des Mines de Paris in 1977 and received the Docteur-Ingenieur degree in Applied Mathematics from Université Paris-IX in 1982.