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Modeling & Verification of Mixed Signal IP using SystemVerilog in Virtuoso & NCsim

Biography:

Tom Thomas is a Lead Designer for analog designs at Silabtech Pvt Ltd, India. He has expertise of more than ten years in design and verification of high speed analog and mixed-signal IPs. He has been with Silabtech for the last three years. Previously he worked with Analog and Mixed Signal Team at Wipro Technologies, India.