A Knowledge Sharing Framework for Fabs, SoC Design Houses and IP Vendors
By Anne Meixner,
The Engineers' Daughter LLC
The semiconductor industry has knowledge siloed into Design, Fab and Test. This paper proposes data structures specific to IP design characteristics for test manufacturing data system that can connect these silos. These structures enhance the ability to comprehend manufacturability at the IP level. Benefits for IDMs, Foundries, IP developers and System on a Chip (SoC) design houses are listed. Challenges in implementing these data structures in an IDM environment are included as well as data analysis examples.
Dr. Meixner has 30+ years in the semiconductor industry. Over that period, she focused on test methodology in particular in analog DFT and test. Dr Meixner has worked at IBM, Carnegie Mellon University and Intel. She holds three U.S. patents and was awarded two best papers at IEEE International Test Conference. In her consulting business she applies her expertise to make her clientâ€™s projects more successful.