Reusable Verification Model for Motion estimation Algorithm
By Anil Celebi,
Increasing functionalities of application specific integrated circuits (ASIC) require rather more efficient verification methods. In this paper, a novel verification model (VM) for low complexity motion estimation (ME) hardware architecture used in a video encoder is proposed. MATLAB, C and SystemVerilog based hybrid VM is proposed. A multilayer based approach is adopted where a generator, agent, driver, scoreboard, monitor and checker is utilized. Object oriented programming (OOP) capability of the SystemVerilog makes the VM more efficient and reusable compared to the existing VMs presented in the literature. Additionally, functional coverage of ME algorithm is also performed. According to the experimental results it can be concluded that such a verification approach is a proper solution for verifying complex signal processing integrated circuit (IC) designs.
Anil Celebi was born in Ordu, Turkey. He received the B.Sc., M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Kocaeli University, Kocaeli, Turkey, in 2002, 2005, and 2008, respectively. Since 2002 he has been with the Department of Electronics and Telecommunications Engineering, University of Kocaeli, Turkey. He worked as a BK21 Post Doctoral Research fellow at the School of Electrical Engineering and Computer Science at Seoul National University, Korea between April - July 2009. His research interests include very large scale integration (VLSI) design and implementation for analog/mixed signal systems, image processing and video coding systems.
He is currently working as an Assistant Professor at the Department of Electronics and Telecommunications Engineering, University of Kocaeli, Turkey. He is also founder of KuanTek Electronics and Information Technologies Ltd (www.kuantek.com.tr).