Fractional-N PLLs : Versatile Frequency Synthesis Building Block
By Randy Caplan, Executive Vice President, Silicon Creations

Biography:

Randy Caplan is President and Co-Founder of Silicon Creations. He has led the development of Silicon Creatons' high performance clocking IP product line which includes over 40 unique timing solutions for applications such as SONET, PCIe, Infiniband, SATA and IEEE 802.11b/g/n.

Prior to founding Silicon Creations, he was the senior PLL architect at Mosaid and Virtual Silicon, and lead SerDes designer in the High Speed Networking group at HP/Agilent. Randy has three patents in the areas of PLL design and analog circuit design.