Subsystem Verification Solution Features Integrated Testbench Generation, Subsystem Level Test Suite, System Monitor, Coverage Checks, Performance Tests and Analysis
MOUNTAIN VIEW, Calif., May 24, 2016 -- Synopsys, Inc. (NASDAQ: SNPS) today announced the availability of the industry's first cache coherent subsystem verification solution for Arteris' Ncore interconnect. The Arteris Ncore interconnect is a configurable distributed heterogeneous cache coherent interconnect that enables system on chip (SoC) teams to efficiently design customized, fully coherent systems. With Synopsys' configurable cache coherent Network-on-Chip (NoC) subsystem verification solution, SoC teams can accelerate verification closure of their particular Arteris Ncore cache coherent interconnect configuration.
"The Arteris Ncore interconnect delivers enhanced configurability for heterogeneous cache coherent SoCs in multiple markets including mobility, automotive, storage and networking," said Craig Forrest, Chief Technology Officer at Arteris. "Synopsys' NoC subsystem verification solution is a key enabler for our mutual customers to efficiently verify their complex SoC designs for overall productivity gains."
The Synopsys cache coherent NoC subsystem verification solution generates UVM testbench logic that integrates with Arteris Ncore interconnect testbenches, enabling connectivity of new subsystem level tests, monitors, coverage and performance tests, and analysis to achieve accelerated verification closure. The cache coherent NoC interconnect subsystem solution includes subsystem level test suites to validate the coherency of the system, in addition to the correctness of data flow across the NoC. Synopsys' Verdi® Performance Analyzer is natively integrated in the cache coherent NoC subsystem verification solution for functional scenarios and provides debug capabilities for performance issues across the SoC. In addition, Synopsys' Platform Architect™ MCO enables analysis of the Arteris Ncore interconnect subsystem models, allowing designers to optimize architecture performance and power earlier.
"We continue to work closely with industry leaders to develop the industry's first subsystem verification solution," said Vikas Gautam, group director of VIP R&D and corporate applications for the Synopsys Verification Group. "With the Synopsys NoC solution we have enabled SoC teams to achieve accelerated verification closure with automated testbench generation and integration, as well as subsystem and performance verification."
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.