Another Industry first: Extreme Networking- 1K TCP & UDP Session on intel/Xilinx FPGAs, high availability application performance - 2U Accelerator box with Linux iWARP/RoCE

The 10^th generation TCP Accelerator delivers an unprecedented number of 1K TCP/UDP Sessions in ~100 nanoseconds with sustained ~10G bps throughput, providing up to 10x advantage over the legacy Software-TCP-Stacks, The only computing platform capable of instantly distributing and running applications across thousands of multiple clients/servers simultaneously.

Milpitas, CA. -- July 7, 2021— Intilop, Inc., a pioneer, most respected and recognized leader in providing Ultra-Low latency and Hyper-Performance Complex Networking Protocol Accelerators, Mega IP Cores, Systems/Solutions since 2009, announces their Enhanced 10G bit 1K concurrent-TCP&UDP-Session Accelerator plus iWARP system with Kernel-Bypass Linux drivers for Intel/Xilinx FPGA boards. The system with TCP-Accelerator delivers ~95% of ~10Gbps per port bandwidth across all 1K simultaneous connections or active TCP Sessions. The appliance can also be made available for RoCE protocol

The self-contained Linux white-box provides networking OEMs Ultra-low-latency/Hyper-performance who have to instantly transfer multi-Giga/Tera bytes of Data-files across multiple users on large networks. It solves a common problem in legacy Networked systems where application availability is slow/sporadic.

However, workers, especially working from home, face unique issues such as poor network stability, saturated local connections, and unpredictable and slow application performance. In addition, network latency and security become even bigger problems to solve as data moves back and forth between local networks, corporate networks, and the cloud.

E.g, In healthcare use cases, when caring for patients, every second counts. Immediate access to crucial data can mean more accurate and potentially lifesaving healthcare diagnoses or procedures. Reducing latency, which can improve speed of access to information and enable better application performance, has emerged as a key driver for hospitals and healthcare systems to deliver real time Edge computing performance

Available in Intel and Xilinx FPGA based platforms. Now these bottlenecks are the thing of the past, Specifically, this TCP/UDP Accelerator utilizes massively parallel processing power of FPGAs, is targeted towards the next generation of Cloud Computing, Data Center, Network Security, Telecomm and all other Hyper-Performance Network Computing server appliances in Military/government and private enterprises. The Full TCP Offload core utilized runs without any CPU involvement saving tremendous amount of power and CPU processing cycles. The TCP connections maintain the same high throughput and low latency regardless of number of simultaneous connections in progress. This is a vast difference compared with other leading TCP Accelerator ASICs on various NICs that implement partial TCP-Offloads and suffer major performance degradation when handling just 10-20 simultaneous TCP Sessions/Clients. The unprecedented TCP throughput is up to 8x higher as compared to TCP/IP software running on typical host CPU/NIC. The current white box version has single Xeon CPU+32 GB DDR-motherboard (upgradable with Multiple CPUs and cores and lot more memory).

The first of its kind Platform has the TCP-Kernel Bypass driver and iWARP support. Clients will be able to utilize FPGAs technology from intel/Xilinx to get all of the benefits of TCP hardware acceleration. Furthermore, Clients can accelerate their biz logic even more, by utilizing the complete FPGA board/development Kit that is available with S/W driver subsystem which provides customers interfaces to start using it right out of the box.

Previous 9 generations of Full TCP/UDP-Accelerators provide up-to 256 Simultaneous TCP Connections delivering line rate performance at 100 ns TCP processing time and have been available on most Intel/Xilinx FPGA boards/platforms.

As a pioneer, Intilop was the first company to deliver a series of Full TCP Offload Engines on FPGAs in 2009. Their sub 100 ns latency MAC+TOE&UOE are considered a ‘Gold Standard’ by the industry experts.

The highly deterministic performance, zero jitter, utmost reliability and interoperability with so many other TCP software stacks on the other side, coupled with customizability is truly unprecedented.

The Series of TOE/UOE IP Cores implementing 16K, 8K, 1K, 256 and 32 Concurrent TCP/UDP Sessions is available at: https://intilop.com/ipcores.php

About Intilop: Intilop is a developer, provider, a recognized leader and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems.